Abstract: A text comparator which includes a decoded data memory (13) which contains a plurality of shift registers (SR2.0.-SR7F), one shift register for each one of the plurality of different symbols forming the data base stored within the mass storage device (11). The decoded signal is applied to the input lead of the shift register associated with that character, and a clock signal applied to each shift register of the decoded data memory. In this manner, the decoded data memory will provide signals on the output leads of each shift register indicative of the most recently received character, as well as each of the preceding K characters received from the mass storage device and decoded, where K is the number of bits contained in each shift register of the decoded data memory.

Abstract: A text comparator which includes a decoded data memory (13) which contains a plurality of shift registers (SR2d-SR7F), one shift register for each of the plurality of different symbols forming the data base stored within the mass storage device (11). The decoded signal is applied to the input lead of the shift register associated with that character, and a clock signal applied to each shift register of the decoded data memory. The decoded data memory will provide signals on the output leads of each shift register indicative of the most recently received character, as well as each of the preceding K characters received from the mass storage device and decoded. The output leads of the shift registers are connected to a variety of logic gates in order to provide an output signal indicating when the desired textual phrase has been located on the disk. In addition, word counters, paragraph counters, and other devices are employed as desired to provide special text comparison functions.

Abstract: A text comparator receives data stored in a mass storage device. The text comparator includes word logic, delimiter logic, set logic, set combination logic, proximity logic, and programming logic. The delimiter logic serves to monitor the characters transferred from the mass storage device and provides discrete signals depicting whether the character being transferred is a predefined delimiter character. The word logic serves to store data regarding predefined words (i.e., strings of characters) which are to be located and provides output word signals indicating when such predefined words have been located. The set logic receives the delimiter signals and word signals and provides output signals when selected words are located in the same sentence, same paragraph, etc., as desired. The set combination logic serves to combine the signals from the set logic in order to generate output signals in response to more complex search strategies than can be easily detected by the set logic.

Abstract: A text comparator which includes a decoded data memory (13) which contains a plurality of shift registers (SR2.0.-SR7F), one shift register for each one of the plurality of different symbols forming the data base stored within the mass storage device (11). The decoded signal is applied to the input lead of the shift register associated with that character, and a clock signal applied to each shift register of the decoded data memory. In this manner, the decoded data memory will provide signals on the output leads of each shift register indicative of the most recently received character, as well as each of the preceding K characters received from the mass storage device and decoded, where K is the number of bits contained in each shift register of the decoded data memory.