Patents by Inventor James Thomas Cargo

James Thomas Cargo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7972873
    Abstract: Devices having voids are producible by employing an electrochemical corrosion process. For example, an electrically conductive region is formed to have a surrounding chemically distinct region. Such formation is possible through conventional semiconductor processing techniques such as a copper damascene process. The surrounded conducting material is configured to be in electrical communication with a charge separation structure. The electrically conducting region is contacted with a fluid electrolyte and electromagnetic radiation is made to illuminate the charge separation region to induce separation of electrons and holes. The resulting separated charges are used to drive an electrochemical corrosion process at the conductive material/electrolyte interface resulting in the removal of at least a portion of the electrically conducting material.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: July 5, 2011
    Assignee: Agere Systems Inc.
    Inventors: Frank A. Baiocchi, James Thomas Cargo, John Michael DeLucca
  • Publication number: 20100102398
    Abstract: Devices having voids are producible by employing an electrochemical corrosion process. For example, an electrically conductive region is formed to have a surrounding chemically distinct region. Such formation is possible through conventional semiconductor processing techniques such as a copper damascene process. The surrounded conducting material is configured to be in electrical communication with a charge separation structure. The electrically conducting region is contacted with a fluid electrolyte and electromagnetic radiation is made to illuminate the charge separation region to induce separation of electrons and holes. The resulting separated charges are used to drive an electrochemical corrosion process at the conductive material/electrolyte interface resulting in the removal of at least a portion of the electrically conducting material.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Inventors: Frank A. Baiocchi, James Thomas Cargo, John Michael DeLucca
  • Publication number: 20090029490
    Abstract: It has been found that for silicon integrated circuits having capacitor structures or other p-n junctions structure at a technology node of 32 nm or smaller, photovoltaic induced corrosion of copper in the metallization stack is a significant issue. Thus processing conditions or device configurations are employed that preclude such corrosion. In one embodiment photovoltaic induced corrosion is monitored to prevent completion of devices with corrosion defects.
    Type: Application
    Filed: July 22, 2008
    Publication date: January 29, 2009
    Inventors: Frank A. Baiocchi, James Thomas Cargo, John Michael DeLucca, Edward B. Harris
  • Patent number: 7291849
    Abstract: A calibration standard includes a silicon substrate having a plurality of defined regions and a plurality of calibration marks placed on respective defined regions of the silicon substrate. Each calibration mark comprises a different calibration dimension indicator and a corresponding dimension identifier. A method for calibrating a transmission electron microscope using the standard comprises positioning the calibration standard in a viewing area of the transmission electron microscope and sequentially viewing the marks and adjusting the calibration of the microscope for each mark viewed.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: November 6, 2007
    Assignee: Agere Systems Inc.
    Inventors: Frank A. Baiocchi, John Michael DeLucca, James Thomas Cargo
  • Patent number: 6110831
    Abstract: A method of manufacturing integrated circuits utilizing chemical mechanical polishing (CMP) is disclosed. A dielectric layer, illustratively, having a dopant, dye, etc. termed a "marker layer" is formed upon a wafer having partially fabricated integrated circuits thereon. An undoped, undyed layer is deposited upon the marker layer. The undoped or undyed layer is polished and the waste slurry is monitored until a signal indicating the exposure of the signal layer is obtained. Analysis of the signal provides an indication of when the CMP process should be terminated.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: August 29, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: James Thomas Cargo, Ronald James Alexander Holmes, Ruichen Liu, Alvaro Maury