Abstract: A display circuit includes a first pulse width modulated (PWM) signal line coupled to a first switch, a second PWM signal line coupled to a second switch and the signal line, a transistor coupled to the second signal line between the first signal line and the second switch, a third switch coupled to a third PWM signal line, a fourth switch coupled to a fourth PWM signal line, a fifth switch coupled to a fifth PWM signal line, a light emitting diode (LED) including a red element coupled between the first and third switches, a green element coupled between the first and fourth switches, and a blue element coupled between the first and fifth switches, and an LED including a red element coupled between the second and third switches, a green element coupled between the second and fourth switches, and a blue element coupled between the second and fifth switches.

Abstract: A system and a method are provided for multiplexing digital and analog signals to and from a device using a single electrical connector. The system includes a connector with at least four lines and analog and digital interfaces attached to the connector. The interfaces share: first and second analog-to-digital converters (ADCs); and first, second, and third switches. The analog interface includes an audio sub-system with a third ADC and first, second, and third digital-to-analog converters (DACs). The digital interface includes a digital sub-system. The switches have first terminals attached to the connector, second terminals connected to the third ADC and the DACs. The switches open in response to a digital mode signal, enabling a digital signal path from the digital interface terminals to the connector. The switches close in response to an analog mode signal, enabling an analog signal path from the connector to the audio sub-system.

Abstract: A system and a method are provided for multiplexing digital and analog signals to and from a device using a single electrical connector. The system includes a connector with at least four lines and analog and digital interfaces attached to the connector. The interfaces share: first and second analog-to-digital converters (ADCs); and first, second, and third switches. The analog interface includes an audio sub-system with a third ADC and first, second, and third digital-to-analog converters (DACs). The digital interface includes a digital sub-system. The switches have first terminals attached to the connector, second terminals connected to the third ADC and the DACs. The switches open in response to a digital mode signal, enabling a digital signal path from the digital interface terminals to the connector. The switches close in response to an analog mode signal, enabling an analog signal path from the connector to the audio sub-system.

Abstract: A radar processor comprises a multi-port memory device having memory which can be accessed by at least three ports. A first port receives input data from a data providing means. A second port couples a first processor which performs radar processing. A third port couples at least one second processor which assists the first processor by also performing radar processing. The multi-port memory device further includes an arbiter for coordinating and determining when each of the three ports can access the memory of the multi-port memory device. The first and second processors share information with each other via the multi-port memory device.