Abstract: A system-on-a-chip controller having a first processor and a second processor. The first processor provides control processing and image processing. The second processor provides image processing. The processors receive data from an external source through a data bus. Also, the controller can include a third controller to provide I/O functionality to an external device. The second processor processes the stored data in either a row or column configuration. A fixed-length instruction word can be decoded into two instructions, an operation instruction and an I/O instruction, and can be used to process the data. The I/O instruction can be disposed in an unused bit field of the operation instruction.

Abstract: A system-on-a-chip controller having a first processor and a second processor. The first processor provides control processing and image processing. The second processor provides image processing. The processors receive data from an external source through a data bus. Also, the controller can include a third controller to provide I/O functionality to an external device. The second processor processes the stored data in either a row or column configuration. A fixed-length instruction word can be decoded into two instructions, an operation instruction and an I/O instruction, and can be used to process the data. The I/O instruction can be disposed in an unused bit field of the operation instruction.

Abstract: A memory controller circuit for use in a computer system provides memory address and control signals to a single in-line memory module (SIMM) connector. The SIMM connector can hold a SIMM that has dynamic random access memories (DRAMs) mounted on one or both sides. The SIMM connector provides a channel of signals to both sides of the SIMM. A driver associated with each channel receives a memory address and control signal. Each driver either drives a buffered memory signal to the associated channel or is placed in a high impedance state, depending upon whether a SIMM is in the SIMM connector. If a SIMM is in the connector, the driver associated with one of the channels is placed in the high impedance state if it is determined that the SIMM is single-sided. A programmable disabling means provides a driver enable signal to each driver. When the driver enable signal is asserted, the corresponding driver is in an enabled state. A deasserted driver enable signal places the corresponding driver in a disabled state.