Abstract: A bus system is disclosed in which stations having a message to send request access to a parallel bus and an arbitrator responding to the requests connects the transmitters of the stations to the bus in sequence. The words of a message placed on the bus respectively represent the address of the station to which the message is to be delivered, the address of the sending station, and data. A station asserts a signal on one control line in response to its address being on the bus and asserts a signal on another control line if it cannot receive a message. Whether the entire message is placed on the bus or not by the sending station and loaded into the registers of the receiving station depends on whether or not their signals are asserted. An external data transfer means places signals to a station on another parallel bus on an external bus. The external bus is in the form of a loop so that the message eventually returns to the station that sent it.

Abstract: The present invention provides a device which takes the place of the microprocessor in a microprocessor-based system, and which provides the user with manual control and monitoring of the logic level of each separate input or output pin corresponding to the same pin of the single chip microprocessor of the system under test.