Patents by Inventor James W. Lutley

James W. Lutley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6580291
    Abstract: An apparatus comprising a first circuit configured to generate a first portion of an output signal in response to (i) a first supply voltage and (ii) a pullup signal and a second circuit configured to generate a second portion of said output signal in response to (i) a second supply voltage and (ii) a pulldown signal, wherein said first and second circuits are implemented with transistors that normally can only withstand said second supply voltage.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: June 17, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventor: James W. Lutley
  • Patent number: 6535445
    Abstract: An apparatus configured to generate a signal used to refresh a memory cell in response to (i) a write signal, (ii) a global wordline signal, (iii) a block select signal, and (iv) one or more supply voltages.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: March 18, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventor: James W. Lutley
  • Patent number: 6404682
    Abstract: An apparatus comprising a first register, a second register and a plurality of compare circuits. The first register may be configured to store a plurality of first address bits. The second register may be configured to store a plurality of second address bits. The plurality of compare circuits may each be configured to generate an output signal in response to one of said plurality of first address bits and one of said plurality of second address bits. The output signals are generally each at either (i) the same logic state or (ii), a don't care state.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: June 11, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventors: James W. Lutley, Neil P. Raftery, Jonathan F. Churchill, Kenneth A. Maher
  • Patent number: 6362668
    Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate one or more enable signals in response to a first control signal and a clock signal. The second circuit may be configured to generate an output signal in response to the one or more enable signals and the clock signal. The first circuit is configured to sample a frequency of the clock signal.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: March 26, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventors: James W. Lutley, Neil P. Raftery
  • Patent number: 6288948
    Abstract: An apparatus comprising a first register, a second register and a plurality of compare circuits. The first register may be configured to store a plurality of first address bits. The second register may be configured to store a plurality of second address bits. The plurality of compare circuits may each be configured to generate an output signal in response to one of said plurality of first address bits and one of said plurality of second address bits. The output signals are generally each at either (i) the same logic state or (ii) a high-Z state.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: September 11, 2001
    Assignee: Cypress Semiconductor Corp.
    Inventors: James W. Lutley, Neil P. Raftery, Jonathan F. Churchill, Kenneth A. Maher