Abstract: An ASIC chip interfaces with multiple data protocol specifications and includes a demodulator for data messages in a protocol at a first data rate, such as the TACTS protocol, and includes a demodulator for data messages in a protocol at a second data rate, such as the NACTS protocol. The ASIC chip is installed in a system for the transmission and receipt of data messages in the two protocols, and operates under control of a microprocessor, which selects between the available message protocols. Additional data rates and protocols beyond the first two can be accommodated. The different demodulators share processing structures that reduce the circuit components otherwise necessary for operation. This reduces the weight and power requirements of the chip. In this way, the ASIC chip provides a processing system that can operate with multiple data protocol specifications and data rates, while ensuring accurate and reliable detection of data streams in an aircraft operational environment.

Abstract: A digital interface device conveys signals between aircraft data busses and a wingtip weapons station. A first interface is provided, coupling to an F/A-18 Aircraft Instrumentation Subsystem Internal (AISI) input/output connector. A second interface is coupled to a secondary armament bus. A crossover cable interconnects the wingtip weapon station to the secondary armament bus. A digital data processing module is coupled to the first and second interfaces and programmed to convey signals between aircraft data systems coupled to the F/A-18 AISI input/output connector and the wingtip weapon station. Namely, the processing module monitors signals received on the input/output connector, and extracts signals addressed to one or more predetermined addresses. The module also transmits the reformatted signals to the wingtip weapon station. With a minimum of wiring changes, the interface easily converts an aircraft designed for a nose-mounted ACT pod for use with an ACT pod mounted at a wingtip station.