Abstract: In one set of embodiments, a power management system comprises two or more devices, such as POL devices, configured to transmit and receive data over a shared bus, such as an I2C bus, according to the bus protocol of the shared bus. Each device may be configured with at least one respective address register, which may be programmed with an address uniquely identifying the device, and a mask register that may be configured to mask select bits of the respective address register, thereby enabling the device to identify device groups. In one embodiment, one of the devices identifying itself as a master device may distribute information to any of the other devices by transmitting the information, which may include commands and/or data, to itself, in effect targeting the address programmed into its own address register.

Abstract: A switch-mode power supply (SMPS) controller integrated circuit (IC) provides ease of integration and SMPS designs. Value and/or types of components external to the controller IC that affect the SMPS control loop response are provided to the IC and an internal conversion block determines coefficients for a digital compensator in conformity with the provided value/type information. The conversion block may be a look-up table, processor or dedicated logic, and the component value/type information may be provided via terminals of the controller IC via logic state, attached resistance/capacitance or from external storage. Alternatively, the component values may be programmed into non-volatile storage within the controller IC.

Abstract: A power management system may comprise two or more POL regulators configured to transmit and receive data over a shared bus according to either a proprietary or a common bus protocol. Each POL regulator may be identified by a unique address that is part of an address group, and may be configured via pin strapping to be able to perform a variety of power management functions. Any one of the POL regulators within the address group may become a bus master and transmit information to the shared bus by addressing itself. The other POL regulators in the address group may monitor the shared bus for events, and may respond to the transmitted information according to their address, their configuration, and the transmitted information. The response may include the POL regulators performing one or more power management functions, including adjusting their respective output voltages.

Abstract: A power management system may comprise two or more POL regulators configured to transmit and receive data over a shared bus according to either a proprietary or a common bus protocol. Each POL regulator may be identified by a unique address that is part of an address group, and may be configured via pin strapping to be able to perform a variety of power management functions. Any one of the POL regulators within the address group may become a bus master and transmit information to the shared bus by addressing itself The other POL regulators in the address group may monitor the shared bus for events, and may respond to the transmitted information according to their address, their configuration, and the transmitted information. The response may include the POL regulators performing one or more power management functions, including adjusting their respective output voltages.

Abstract: A switch-mode power supply (SMPS) controller integrated circuit (IC) provides ease of integration and SMPS designs. Value and/or types of components external to the controller IC that affect the SMPS control loop response are provided to the IC and an internal conversion block determines coefficients for a digital compensator in conformity with the provided value/type information. The conversion block may be a look-up table, processor or dedicated logic, and the component value/type information may be provided via terminals of the controller IC via logic state, attached resistance/capacitance or from external storage. Alternatively, the component values may be programmed into non-volatile storage within the controller IC.

Abstract: A power management system may comprise two or more POL regulators configured to transmit and receive data over a shared bus according to either a proprietary or a common bus protocol. Each POL regulator may be identified by a unique address that is part of an address group, and may be configured via pin strapping to be able to perform a variety of power management functions. Any one of the POL regulators within the address group may become a bus master and transmit information to the shared bus by addressing itself. The other POL regulators in the address group may monitor the shared bus for events, and may respond to the transmitted information according to their address, their configuration, and the transmitted information. The response may include the POL regulators performing one or more power management functions, including adjusting their respective output voltages.

Abstract: A new system-level approach to managing the delivery of DC voltage and current. Several system level functions may be enabled without requiring separate ICs to perform those functions. Supervisory functions for a voltage converter may be performed by a central control module or chip that may be coupled to point-of-load voltage converters comprised in digital power management devices (DPMD) through a serial digital bus. The DPMDs may also use the high-speed serial digital bus to provide real-time feedback information to the central control module or chip. Single DPMDs may be combined together in a current sharing configuration in a “plug-and-play” fashion, where the control logic in each DPMD is capable of automatically establishing control loops required a multi-phase supply. Feedback necessary for establishing control may be transmitted across the digital bus coupling the devices.

Abstract: In one set of embodiments, a power management system comprises two or more devices, such as POL devices, configured to transmit and receive data over a shared bus, such as an I2C bus, according to the bus protocol of the shared bus. Each device may be configured with at least one respective address register, which may be programmed with an address uniquely identifying the device, and a mask register that may be configured to mask select bits of the respective address register, thereby enabling the device to identify device groups. In one embodiment, one of the devices identifying itself as a master device may distribute information to any of the other devices by transmitting the information, which may include commands and/or data, to itself, in effect targeting the address programmed into its own address register.

Abstract: A new system-level approach to managing the delivery of DC voltage and current. Several system level functions may be enabled without requiring separate ICs to perform those functions. Supervisory functions for a voltage converter may be performed by a central control module or chip that may be coupled to point-of-load voltage converters comprised in digital power management devices (DPMD) through a serial digital bus. The DPMDs may also use the high-speed serial digital bus to provide real-time feedback information to the central control module or chip. Single DPMDs may be combined together in a current sharing configuration in a “plug-and-play” fashion, where the control logic in each DPMD is capable of automatically establishing control loops required a multi-phase supply. Feedback necessary for establishing control may be transmitted across the digital bus coupling the devices.

Abstract: A new system-level approach to managing the delivery of DC voltage and current. Several system level functions may be enabled without requiring separate ICs to perform those functions. Supervisory functions for a voltage converter may be performed by a central control module or chip that may be coupled to point-of-load voltage converters comprised in digital power management devices (DPMD) through a serial digital bus. The DPMDs may also use the high-speed serial digital bus to provide real-time feedback information to the central control module or chip. Single DPMDs may be combined together in a current sharing configuration in a “plug-and-play” fashion, where the control logic in each DPMD is capable of automatically establishing control loops required a multi-phase supply. Feedback necessary for establishing control may be transmitted across the digital bus coupling the devices.

Abstract: A new system-level approach to managing the delivery of DC voltage and current. Several system level functions may be enabled without requiring separate ICs to perform those functions. Supervisory functions for a voltage converter may be performed by a central control module or chip that may be coupled to point-of-load voltage converters comprised in digital power management devices (DPMD) through a serial digital bus. The DPMDs may also use the high-speed serial digital bus to provide real-time feedback information to the central control module or chip. Single DPMDs may be combined together in a current sharing configuration in a “plug-and-play” fashion, where the control logic in each DPMD is capable of automatically establishing control loops required a multi-phase supply. Feedback necessary for establishing control may be transmitted across the digital bus coupling the devices.