Patents by Inventor James W. Toy

James W. Toy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6075634
    Abstract: A fiber optic digital communication system and associated transponder architecture interfaces Gigabit Ethernet digital data over an extended range fiber optic link (e.g. upwards of 30 to 100 km), using digital data signal regeneration and optical signal processing components, that pre- and post-compensate for distortion and timing jitter, and thereby ensure accurate regeneration of the data at the far end of the extended distance fiber optic link. Regeneration in both the transmit and receive paths compensates for signal degradation resulting from the very substantial `long haul` fiber distance between transponder sites, and timing jitter customarily present in low cost short haul fiber optic transceiver components. A high speed, low jitter, limiting current driver drives a distributed feedback laser, minimizing jitter generation, and optimizing range extension margin.
    Type: Grant
    Filed: August 5, 1998
    Date of Patent: June 13, 2000
    Assignee: JDS Uniphase Corporation, UBP
    Inventors: Paul W. Casper, James W. Toy, Marc Sawyer
  • Patent number: 5550864
    Abstract: A totally D.C. balanced and bit-rate independent digital clock encoding technique is applicable to a variety of digital signalling systems, including fiber optic digital signalling. Each of successive event cells of the clock signal is demarcated by clock transitions of opposite polarity, so that each clock cycle contains two event cells, one of which is redundant. For a first binary data value, such as a `0`, a pair of unmodified successive event cells of the clock signal are provided as an output. Namely, the clock signal is unaffected, so that both halves of a complete, unmodified clock cycle are reproduced `as is` as the encoded clock output. For a second binary data value, such as a `1`, an event cell is modified by inserting a pulse, of finite duration, less than the duration of the event cell, the pulse being delayed with respect to a leading clock transition of the pair of alternating, opposite clock transitions of the event cell.
    Type: Grant
    Filed: December 1, 1993
    Date of Patent: August 27, 1996
    Assignee: Broadband Communications Products
    Inventors: James W. Toy, Paul W. Casper
  • Patent number: 5457560
    Abstract: A fiber optic telecommunication system has master site linked to a plurality of subscriber interface sites by a single pair of optical fibers. Downlink messages are transmitted in a continuous TDM format over a first optical fiber from the master site to subscriber interface sites, and in a burst mode TDMA format over a second optical fiber from the subscriber interface sites to the master site. Each subscriber interface site is coupled to the optical fiber link by way of a multiple fan-out fiber coupling pedestal at a common location on the fiber pair. To prevent collisions between successive uplink bursts from the subscriber interface sites, a guard band separates successive uplink messages from one another. The guard band duration accommodates optical fiber transmission distance between the common location on the uplink optical fiber and the subscriber interface site whose differential optical fiber transmission distance from the common location is greatest.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: October 10, 1995
    Assignee: Broadband Technologies, Inc.
    Inventors: Randall B. Sharpe, J. Richard Jones, Thomas E. O'Shea, Paul W. Casper, James W. Toy, Gregory M. Evans, Richard N. Sears
  • Patent number: 5410600
    Abstract: A prescramble encoding mechanism divides a data word into a plurality of sequences of data bits for transmission over a fiber optic communication link. Complementary versions of control bits and odd and even parity bits are interleaved between the bit parallel data and control signals, divides a parallel data word possible series of consecutive bits of the same logical state is less than a predetermined number related to the length of the data bit sequences and to placement of the complementary control bits and even and odd parity bits. The data frame is then scrambled prior to transmission over the fiber optic link. Depending on the exact nature of the scrambling and descrambling process, a single-bit link error may produce a plurality of bit errors in the descrambled frame.
    Type: Grant
    Filed: November 18, 1991
    Date of Patent: April 25, 1995
    Assignee: Broadband Communications Products, Inc.
    Inventor: James W. Toy
  • Patent number: 5150247
    Abstract: A fiber optic telecommunication system has master site linked to a plurality of subscriber interface sites by a single pair of optical fibers. Downlink messages are transmitted in a continuous TDM format over a first optical fiber from the master site to subscriber interface sites, and in a burst mode TDMA format over a second optical fiber from the subscriber interface sites to the master site. Each subscriber interface site is coupled to the optical fiber link by way of a multiple fan-out fiber coupling pedestal at a common location on the fiber pair. To prevent collisions between successive uplink bursts from the subscriber interface sites, a guard band separates successive uplink messages from one another. The guard band duration accommodates optical fiber transmission distance between the common location on the uplink optical fiber and the subscriber interface site whose differential optical fiber transmission distance from the common location is greatest.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: September 22, 1992
    Assignee: Broadband Technologies, Inc.
    Inventors: Randall B. Sharpe, J. Richard Jones, Thomas E. O'Shea, Paul W. Casper, James W. Toy, Gregory M. Evans, Richard N. Sears
  • Patent number: 4477895
    Abstract: A multichannel data link switching control arrangement for synchronizing the substitution of one data channel for another without causing the insertion or deletion of data bits from the data transmitted over the communication path that is coupled to the channels. The switching control arrangement monitors the relative timing between the data on a channel to be replaced and the data on the replacement channel. Precisely controlled delay circuitry delays the data on one channel relative to the other until the data signals on the two channels are within .+-. a quarter bit of each other, at which time the channel substitution is effected.The arrangement includes a pair of control switch units each of which may be selectively controlled to couple either the active channel or the replacement channel to an output communication link. Each switch control unit contains an input multiplexer and an output switch, the operations of which are controlled by a data timing monitoring apparatus or control unit.
    Type: Grant
    Filed: November 10, 1981
    Date of Patent: October 16, 1984
    Assignee: Harris Corporation
    Inventors: Paul W. Casper, James W. Toy, Fred J. Orlando, Jr., Ronald R. Giri
  • Patent number: 4451916
    Abstract: A repeatered, multichannel fiber optic communication network includes a plurality of full duplex fiber optic channels and one or more auxiliary channels. In order to supervise and control the operation of the network, for both data transmission and fault/maintenance actions, each terminal station contains a processor-based subsystem capable of network monitoring, first level maintenance action, fault isolation, and remote network control and status reporting. This processor-based subsystem interfaces with each fiber optic channel, with an orderwire communication link, and with external input/output devices and surveillance equipment. Three substantially autonomous processor-based sections which are dedicated to performing specific functions within the overall network operation are employed for carrying out these separate interfacing tasks.
    Type: Grant
    Filed: May 12, 1980
    Date of Patent: May 29, 1984
    Assignee: Harris Corporation
    Inventors: Paul W. Casper, Norman C. Seiler, Thomas J. Nixon, George A. Waschka, Jr., Charles R. Patisaul, James W. Toy, Willie T. Burton, Jr., W. B. Ashley, Fred J. Orlando, Jr., Ronald R. Giri, Peter H. Halpern, J. Richard Jones, Harold Iley
  • Patent number: 4383322
    Abstract: In a communication system containing a scheme for externally synchronizing and scrambling digital data signals, serial digital data signals to be transmitted are subdivided into prescribed numbers or sets between which additional or overhead bits are inserted, the resulting sequence being summed in a modulo-two adder with a multi-bit maximal length PN sequence, so that one of the overhead bits is one of the bits of the maximal length scrambling sequence.A multiplexing operation yields a higher data rate sequence which is then modulo-two added with the output of a scrambler and transmitted.At the receiver station, the incoming scrambled sequence is applied to timing recovery circuitry including a local framing sequence generator. The framing sequence is located and the stages of a separate shift register, which forms part of a descrambler PN sequence generator, are forced to a state which is coincident with the frame marker.
    Type: Grant
    Filed: May 2, 1980
    Date of Patent: May 10, 1983
    Assignee: Harris Corporation
    Inventors: Peter H. Halpern, James W. Toy, Charles R. Patisaul