Patents by Inventor James Walling

James Walling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110096368
    Abstract: An improved security system is disclosed for material printed on a substrate comprising a primary marking printed on the substrate for conveying information. A secondary marking provides security to the primary marking. The secondary marking may include a variation in optical properties, a variation in magnetic properties or a variation in both in optical properties and magnetic properties of the primary marking. A method is disclosed comprising printing a primary and a secondary marking on a substrate with the primary marking conveying information and with the secondary marking providing security to the primary marking.
    Type: Application
    Filed: September 16, 2010
    Publication date: April 28, 2011
    Inventors: James Maher, James Walling, Timothy Armstrong, Sean Maher
  • Patent number: 7160039
    Abstract: The invention relates to an optical sub-assembly package for use in receiver optical sub-assemblies or transmitter optical sub-assemblies in which the electrical connections between the transducer chip, e.g. photo-detector or light source, and the device printed circuit board is made by a single flexible circuit conductor extending through the wall of the package. The package is comprised of a housing and a stiffening plate, which encloses and end of the housing and forms a mechanical support for an end of the flexible circuit conductor.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: January 9, 2007
    Assignee: JDS Uniphase Corporation
    Inventors: Marian C. Hargis, David Peter Gaio, Roger T. Lindquist, William K. Hogan, James Walling, Sundeep Nangalia, Philip Deane, Miles F. Swain, Christopher M. Gabel
  • Publication number: 20050175299
    Abstract: The invention relates to an optical sub-assembly package for use in receiver optical sub-assemblies or transmitter optical sub-assemblies in which the electrical connections between the transducer chip, e.g. photo-detector or light source, and the device printed circuit board is made by a single flexible circuit conductor extending through the wall of the package. The package is comprised of a housing and a stiffening plate, which encloses and end of the housing and forms a mechanical support for an end of the flexible circuit conductor.
    Type: Application
    Filed: January 25, 2005
    Publication date: August 11, 2005
    Applicant: JDS Uniphase Corporation
    Inventors: Marian Hargis, David Gaio, Roger Lindquist, William Hogan, James Walling, Sundeep Nangalia, Philip Deane, Miles Swain, Christopher Gabel
  • Patent number: 6792171
    Abstract: The invention relates to a receiver optical sub-assembly (ROSA) for use in a high-speed small-form factor transceiver. The ROSA, according to the present invention, includes a stacked chip design in which a semiconductor micro-bench, upon which the photodiode and trans-impedance amplifier are mounted, is disposed perpendicular to the direction that the light travels. A flexible electrical connector is attached to the semiconductor micro-bench for electrically connecting the ROSA to a host a transceiver device. The flexible electrical connector is fixed to the surface of the semiconductor micro-bench with portions cut-out to receive the amplifier and other electrical components extending therefrom. To facilitate assembly, wells are etched from the semiconductor micro-bench corresponding to bumps extending from a mounting flange for the optical coupler.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: September 14, 2004
    Assignee: JDS Uniphase Corporation
    Inventors: Marian C. Hargis, David Peter Gaio, Christopher M. Gabel, Sundeep NandNangalia, James Walling, Philip Deane, William K Hogan
  • Publication number: 20040105627
    Abstract: The invention relates to a receiver optical sub-assembly (ROSA) for use in a high-speed small-form factor transceiver. The ROSA, according to the present invention, includes a stacked chip design in which a semiconductor micro-bench, upon which the photodiode and trans-impedance amplifier are mounted, is disposed perpendicular to the direction that the light travels. A flexible electrical connector is attached to the semiconductor micro-bench for electrically connecting the ROSA to a host transceiver device. The flexible electrical connector is fixed to the surface of the semiconductor micro-bench with portions cut-out to receive the amplifier and other electrical components extending therefrom. To facilitate assembly, wells are etched from the semiconductor micro-bench corresponding to bumps extending from a mounting flange for the optical coupler.
    Type: Application
    Filed: November 14, 2003
    Publication date: June 3, 2004
    Applicant: JDS Uniphase Corporation
    Inventors: Marian C. Hargis, David Peter Gaio, Christopher M. Gabel, Sundeep Nand Nangalia, James Walling, Philip Deane, William K. Hogan
  • Patent number: 6709765
    Abstract: An aesthetic, hangable ornament is produced by cutting a blank in the shape of, e.g. a bird or a butterfly from a laminate of three layers of vinyl, the outer two layers of which are holographic, cutting a hole in the blank, cutting slits in the blank to form a body including strips extending radially from a planar annulus around the hole to the periphery of the body, crimping the strips to incline them by 20-30° from the plane of the annulus, and mounting a multifaceted, polyhedral crystal in the hole using a hook, which is also used to suspend the ornament from a clear line.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: March 23, 2004
    Assignee: Off The Wall Creations Ltd.
    Inventor: James Walling
  • Publication number: 20030219550
    Abstract: An aesthetic, hangable ornament is produced by cutting a blank in the shape of, e.g. a bird or a butterfly from a laminate of three layers of vinyl, the outer two layers of which are holographic, cutting a hole in the blank, cutting slits in the blank to form a body including strips extending radially from a planar annulus around the hole to the periphery of the body, crimping the strips to incline them by 20-30° from the plane of the annulus, and mounting a multifaceted, polyhedral crystal in the hole using a hook, which is also used to suspend the ornament from a clear line.
    Type: Application
    Filed: May 23, 2002
    Publication date: November 27, 2003
    Inventor: James Walling
  • Patent number: 6091318
    Abstract: A metalization layer formed as part of a bump connection/flip chip process for a semiconductor circuit is also used to form a sense resistor or other passive components. The metalization layers normal composition can also be altered so as to change or control the value of the so formed resistor or to improve the temperature stability of the resistor. Other passive components such as capacitors or inductor can also be formed in this layer.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 18, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Gary V. Zanders, James Walling, Steven N. Hass