Patents by Inventor James Wong
James Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250125286Abstract: A semiconductor device includes a metal base, a wall, a lid, a semiconductor die, and at least one capacitor. The wall is placed on the metal base, and provides an opening portion inside of the wall. The lid is placed on the wall. The semiconductor die is placed on the metal base. The semiconductor die is surrounded with the wall to be placed in the opening portion. The capacitor is placed on the wall. A first end of the capacitor is electrically connected to the semiconductor die, and a second end of the capacitor is electrically connected to the metal base.Type: ApplicationFiled: September 28, 2021Publication date: April 17, 2025Applicant: Sumitomo Electric Device Innovations, Inc.Inventor: James WONG
-
Publication number: 20250081582Abstract: A semiconductor device according to the present disclosure includes a source electrode provided on a substrate, a gate electrode provided-on the substrate and surrounding a part of the source electrode, a drain electrode provided on the substrate and surrounding the gate electrode, and a gate wiring provided on the substrate, wherein a first end of the gate wiring is connected to only one portion of the gate electrode and a second end of the gate wiring is connected to a first gate bus bar.Type: ApplicationFiled: August 22, 2024Publication date: March 6, 2025Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: James WONG, Kento KAWASAKI
-
Patent number: 12040423Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: GrantFiled: May 25, 2023Date of Patent: July 16, 2024Assignee: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20240204729Abstract: A Doherty amplifier includes a substrate, a first transistor provided on the substrate and including first gate electrodes, first drain electrodes, a first gate bus bar and a first drain bus bar, a second transistor provided on the substrate and including second gate electrodes, second drain electrodes, a second gate bus bar having a first end, and a second drain bus bar, a combining node provided on the substrate and combining a first signal amplified by the first transistor and a second signal amplified by the second transistor, a first line provided on the substrate and connecting the first drain bus bar and the combining node, and a second line provided on the substrate, connecting the second drain bus bar and the combining node, and connected to a second end of the second drain bus bar located diagonally across the second transistor with respect to the first end.Type: ApplicationFiled: December 6, 2023Publication date: June 20, 2024Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: James WONG, Kento Kawasaki
-
Patent number: 11955583Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: GrantFiled: March 26, 2021Date of Patent: April 9, 2024Assignee: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20230418562Abstract: An interactive graphic design system design interface is described to enable design users to create a variant component that links multiple design elements as variants, where each variant represents a state or version of a run-time object, feature or user-interface.Type: ApplicationFiled: June 30, 2023Publication date: December 28, 2023Inventors: Rasmus Andersson, Sho Kuwamoto, Nikolas Klein, James Wong, Ryan Kaplan, Kelsey Whelan, Matthew Huang, Sawyer Hood, Andrew Heine, Jessica Liu, Marcin Wichary, Linda Zhang, Josh Shi, Golf Sinteppadon, Naomi Jung, Andrew Chan, Daniel Furse
-
Publication number: 20230299227Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: ApplicationFiled: May 25, 2023Publication date: September 21, 2023Applicant: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20230268343Abstract: A semiconductor device includes a source bus bar provided on a first surface of a substrate and overlapping with a first via hole penetrating through the substrate, a plurality of first transistors arranged in a second direction intersecting a first direction, each of the first transistors including a first source finger, a first drain finger and a first gate finger which extend in the first direction on the first surface, the first source finger being electrically connected to the source bus bar, and a plurality of second transistors arranged in the second direction, each of the second transistors including a second source finger, a second drain finger and a second gate finger which extend in the first direction on the first surface, the second source finger being electrically connected to the source bus bar, the first transistors and the second transistors sandwiching the source bus bar.Type: ApplicationFiled: February 22, 2023Publication date: August 24, 2023Applicant: Sumitomo Electric Device Innovations, Inc.Inventors: James WONG, Kento KAWASAKI
-
Patent number: 11733973Abstract: An interactive graphic design system design interface is described to enable design users to create a variant component that links multiple design elements as variants, where each variant represents a state or version of a run-time object, feature or user-interface.Type: GrantFiled: September 16, 2021Date of Patent: August 22, 2023Inventors: Rasmus Andersson, Sho Kuwamoto, Nikolas Klein, James Wong, Ryan Kaplan, Kelsey Whelan, Matthew Huang, Sawyer Hood, Andrew Heine, Jessica Liu, Marcin Wichary, Linda Zhang, Josh Shi, Golf Sinteppadon, Naomi Jung, Andrew Chan, Daniel Furse
-
Patent number: 11718077Abstract: A multilayer film for use in adhesive tape or adhesive label applications comprising a core layer and skin layers on each side of the core layer. The core layer comprises a polypropylene mini-random homopolymer, wherein the mini-random homopolymer comprises polypropylene, up to 2 wt % ethylene components, and a acid neutralizer in a concentration up to 5000 ppm calcium. The skin layers each comprise a) at least about 95 wt % of a polypropylene mini-random homopolymer comprising polypropylene, up to 2 wt % ethylene components, and an acid neutralizer in a concentration up to about 5000 ppm, and b) an anti-block agent in a concentration up to about 1 wt %, wherein the anti-block agent comprises at least 95 wt % homopolymer of polypropylene and 1 to 5 wt % of silica having a particle size between about 1 to 3 ?m.Type: GrantFiled: January 14, 2022Date of Patent: August 8, 2023Assignee: INTERPLAST GROUP CORPORATIONInventors: Jame Wong, Chris Watts, Jenchyou Hwang, Juan Rosales, Todd O'Reilly, Ron Silen, Lisa Vasquez
-
Patent number: 11705534Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: GrantFiled: March 26, 2021Date of Patent: July 18, 2023Assignee: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20230102118Abstract: A semiconductor device includes a substrate having a front surface including a first long side and a second long side extending in a first direction and opposed to each other, and a first short side and a second short side extending in a second direction intersecting the first direction and opposed to each other, a source finger provided on the front surface, a drain finger provided on the front surface, and a gate finger provided on the front surface and sandwiched between the source finger and the drain finger, wherein a via hole penetrating the substrate is provided in the substrate, a region where the via hole is connected to the source finger in the front surface is contained within the source finger, and the via hole has a maximum width in the first direction larger than a maximum width in the second direction.Type: ApplicationFiled: September 14, 2022Publication date: March 30, 2023Applicant: Sumitomo Electric Device Innovations, Inc.Inventors: James WONG, Kento KAWASAKI
-
Publication number: 20230068911Abstract: A method of manufacturing a light emitting diode (LED) device includes forming an LED structure by depositing a plurality of semiconductor layers on a transparent substrate. Trenched metal is placed in the plurality of semiconductor layers, with the trenched metal contacting the transparent substrate. The LED structure is attached to a CMOS structure with electrical interconnects that define a cavity therebetween. Laser light is used to provide laser lift-off of the transparent substrate from the plurality of semiconductor layers.Type: ApplicationFiled: March 1, 2021Publication date: March 2, 2023Applicant: Lumileds LLCInventors: Dennis Scott, Chee Chung James Wong, Khing Lim Hii, Pei-Chee Mah, Saraswati .,
-
Patent number: 11580086Abstract: The Tactic Tracking, Evaluation and Identification Engine Apparatuses, Methods and Systems (“TTEIE”) transforms subscription request, tick notification request inputs via TTEIE components into subscription response, identified tactic store request, user interface update notification outputs. A subscription request datastructure from a client is obtained. A set of tactic definition datastructures is retrieved. A tick notification comprising tick data for a tick associated with a target is obtained. A contact datastructure corresponding to each retrieved tactic definition datastructure is added to a tracking list of contact datastructures for the target. The tick data for the tick is appended for each contact datastructure in the tracking list. A contact datastructure's time series of ticks is evaluated with regard to the respective contact datastructure's corresponding time series of rules to classify the respective contact datastructure, for each contact datastructure in the tracking list.Type: GrantFiled: September 19, 2019Date of Patent: February 14, 2023Assignee: FMR LLCInventors: James Wong, Rohan Vaswani, Nan Li, Boris Kalinichenko, Anton Aboukhalil
-
Patent number: 11569788Abstract: An amplifier device includes a substrate, a composite packaged amplifier having a bottom plate and an output plate, a first amplifier and a second amplifier provided on the bottom plate, a combining node that combines an output of the first amplifier with an output of the second amplifier, an output matching circuits provided on the bottom plate, that has a first transmission line provided between the first amplifier and the combining node, and a second transmission line provided between the combining node and the second amplifier, a third transmission line having one transmission line on which the output plate is mounted and other transmission line that connects the one transmission line to the external port, and wirings connecting to one terminal of the output plate and the combining node. A length of the output plate and the other transmission line is equal or less than ?/4 radian for a signal.Type: GrantFiled: October 26, 2020Date of Patent: January 31, 2023Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: James Wong
-
Patent number: 11357344Abstract: An apparatus for positioning flowers within a vase comprises a first hollow hemispherical shell extending to a first hemispherical edge having a plurality of apertures extending therethrough, the shell formed of a plurality of members extending between each of the apertures having a smooth substantially circular cross section and a second hollow hemispherical shell extending to a second hemispherical edge having a plurality of apertures extending therethrough, the shell formed of a plurality of members extending between each of the apertures having a smooth substantially circular cross section. The first and second hollow hemispherical shells are matable to each other along a parting line formed by connecting the first and second hemispherical edges.Type: GrantFiled: October 20, 2017Date of Patent: June 14, 2022Inventor: James Wong
-
Publication number: 20220173276Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: ApplicationFiled: March 26, 2021Publication date: June 2, 2022Applicant: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20220173267Abstract: A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.Type: ApplicationFiled: March 26, 2021Publication date: June 2, 2022Applicant: Lumileds LLCInventors: Yeow Meng Teo, Wee-Hong Ng, Pei-Chee Mah, Chee Chung James Wong, Geok Joo Soh
-
Publication number: 20220134722Abstract: A multilayer film for use in adhesive tape or adhesive label applications comprising a core layer and skin layers on each side of the core layer. The core layer comprises a polypropylene mini-random homopolymer, wherein the mini-random homopolymer comprises polypropylene, up to 2 wt % ethylene components, and a acid neutralizer in a concentration up to 5000 ppm calcium. The skin layers each comprise a) at least about 95 wt % of a polypropylene mini-random homopolymer comprising polypropylene, up to 2 wt % ethylene components, and an acid neutralizer in a concentration up to about 5000 ppm, and b) an anti-block agent in a concentration up to about 1 wt %, wherein the anti-block agent comprises at least 95 wt % homopolymer of polypropylene and 1 to 5 wt % of silica having a particle size between about 1 to 3 ?m.Type: ApplicationFiled: January 14, 2022Publication date: May 5, 2022Applicant: Inteplast Group CorporationInventors: Jame Wong, Chris Watts, Jenchyou Hwang, Juan Rosales, Todd O'Reilly, Ron Silen, Lisa Vasquez
-
Patent number: RE49419Abstract: An improved structure of nano-scaled and nanostructured Si particles is provided for use as anode material for lithium ion batteries. The Si particles are prepared as a composite coated with MgO and metallurgically bonded over a conductive refractory valve metal support structure.Type: GrantFiled: September 23, 2019Date of Patent: February 14, 2023Assignee: COMPOSITE MATERIALS TECHNOLOGY, INC.Inventors: James Wong, David Frost