Abstract: A timing recovery loop includes a random walk filter counter for counting early, nominal and late arrivals of data transitions pulses of an input baseband signal waveform encoding a digital bit stream, and provides magnitude counts that are compared to a threshold value that when exceeded by the magnitude counts results in a delay adjustment of the generated adjusted timing pulses then remaining synchronized with the actual bit timing for maintaining bit timing lock. The adjusted timing pulses can then be used by a data detector for reliable data detection and reconstruction of the digital bit stream. The threshold value can be adaptively adjusted for reducing drop lock rates in the presence of changing channel environments.

Abstract: An adaptive predistorter system receives and predistorts an input signal so as to linearize the output signal of a nonlinear high power amplifier amplifying the predistorted input signal using closed-loop feedback of the output signal in complex form at baseband so as to adaptively change the amount of the predistortion of the input signal in the presence of high power amplifier changing characteristics.

Abstract: An adaptive predistorter system receives and predistorts an input signal so as to linearize the output signal of a nonlinear high power amplifier amplifying the predistorted input signal using closed-loop feedback of the output signal in complex form at baseband so as to adaptively change the amount of the predistortion of the input signal in the presence of high power amplifier changing characteristics.

Abstract: A timing recovery loop includes a random walk filter counter for counting early, nominal and late arrivals of data transitions pulses of an input baseband signal waveform encoding a digital bit stream, and provides magnitude counts that are compared to a threshold value that when exceeded by the magnitude counts results in a delay adjustment of the generated adjusted timing pulses then remaining synchronized with the actual bit timing for maintaining bit timing lock. The adjusted timing pulses can then be used by a data detector for reliable data detection and reconstruction of the digital bit stream. The threshold value can be adaptively adjusted for reducing drop lock rates in the presence of changing channel environments.

Abstract: A predistortion method uses an extended Saleh model for linearizing the output of nonlinear high power amplifiers having inherent amplitude modulation to amplitude modulation distortion, and inherent amplitude modulation to phase modulation distortion, during conversions of an input signal to an output signal. A complex baseband linearizer provides predistortion at baseband for reducing spectral regrowth and improves bit error performance. The predistortion effects are matched to the amplifier distortions to cancel out the distortions to provide linearized conversions. The extended Saleh model provides a general solution using selected coefficients matched to distortion effects of a particular amplifier.

Abstract: A predistortion method use a modified linear-log model for linearizing the output of nonlinear high power amplifiers having inherent amplitude modulation to amplitude modulation distortion, and inherent amplitude modulation to phase modulation distortion, during conversions of an input signal to an output signal. A complex baseband linearizer provides predistortion at baseband for reducing spectral regrowth and improves bit error performance. The predistortion effects are matched to the amplifier distortions to cancel out the distortions to provide linearized conversions. The modified linear-log model is used to reduce the clipping effects through the peak operating point for a specified output power loss with minimum distortion.