Patents by Inventor James Zhao

James Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9478608
    Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: October 25, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventors: Javier Alejandro Salcedo, James Zhao, Juan Luo
  • Publication number: 20160204096
    Abstract: Low leakage bidirectional clamps and methods of forming the same are provided. In certain configurations, a bidirectional clamp includes a first p-well region, a second p-well region, and an n-well region positioned between the first and second p-wells regions. The bidirectional clamp further includes two or more oxide regions over the n-well region, and one or more n-type active (N+) dummy blocking current regions are positioned between the oxide regions. The one or more N+ dummy leakage current blocking regions interrupt an electrical path from the first p-type well region to the second p-type well region along interfaces between the n-well region and the oxide regions. Thus, even when charge accumulates at the interfaces due to extended high voltage, e.g., >60V, and/or high temperature operation (e.g., >125° C.), the N+ dummy leakage current blocking regions inhibit charge trapping-induced leakage current.
    Type: Application
    Filed: January 12, 2015
    Publication date: July 14, 2016
    Inventors: James Zhao, Javier Alejandro Salcedo
  • Publication number: 20160192778
    Abstract: A support assembly includes a stand having an underside surface configured to be placed on top of a flat screen device and an upper surface configured to support at least one object; a mount secured to the underside surface of the stand, the mount presenting a first ratchet ring; an arm presenting a second ratchet ring; and a fastener positioned and arranged to mechanically connect the arm to the mount, causing the first ratchet ring to engage the second ratchet ring, setting the arm at a desired angle so that the arm engages the flat screen device while the stand extends at least substantially horizontally from the top of the flat screen device.
    Type: Application
    Filed: January 2, 2015
    Publication date: July 7, 2016
    Inventors: Donald Shen, Michael Roach, James Zhao
  • Publication number: 20160141358
    Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.
    Type: Application
    Filed: November 18, 2014
    Publication date: May 19, 2016
    Inventors: Javier Alejandro Salcedo, James Zhao, Juan Luo
  • Publication number: 20080207812
    Abstract: Thermoplastic molding compositions comprising A) from 10 to 99% by weight of at least one thermoplastic polymer, B) from 0 to 50% by weight of B1) at least one highly branched or hyperbranched polycarbonate with an OH number of from 1 to 600 mg KOH/g of polycarbonate (to DIN 53240, Part 2), or B2) at least one highly branched or hyperbranched polyester of AxBy type, where x is at least 1.1 and y is at least 2.1, or a mixture of these, C) from 1 to 30% by weight of a flame retardant combination composed of, based on 100% by weight of C), C1) from 20 to 99% by weight of a halogen-containing epoxy resin, C2) from 1 to 80% by weight of an antimony oxide, D) from 0 to 60% by weight of other additives, where the total of the percentages of components A) to D) is 100%.
    Type: Application
    Filed: July 6, 2006
    Publication date: August 28, 2008
    Applicant: BASF Aktiengesellschaft
    Inventors: Claudia Mettlach, Andreas Eipper, Bernd Bruchmann, Carsten Weiss, Michael Gall, ByungSeok Kim, James Zhao
  • Patent number: D778917
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: February 14, 2017
    Assignee: Suncraft Solutions, Inc.
    Inventors: Donald Shen, Michael Roach, James Zhao
  • Patent number: D792419
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: July 18, 2017
    Assignee: Suncraft Solutions, Inc.
    Inventors: Donald Shen, Michael Roach, James Zhao