Patents by Inventor Jami Wang

Jami Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MODULAR ENCLOSURE FOR AN IN-VEHICLE COMPUTER SYSTEM
    Publication number: 20240349442
    Abstract: A modular enclosure is configured to house a set of components that facilitate the autonomous functions of an autonomous vehicle while meeting a set of requirements. The set of components comprises a sensor processing unit configured to detect objects from sensors associated with the autonomous vehicle, a compute unit configured to determine a navigation path for the autonomous vehicle, a vehicle control unit configured to control the autonomous function of the autonomous vehicle, a communication gateway configured to establish communication of the autonomous vehicle, and a data diagnostics unit configured to determine a health data for at least one component of the autonomous vehicle. The set of requirements comprises a space requirement, a communication requirement, a cooling requirement, and a shock absorption requirement.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 17, 2024
    Inventors: Stephen W. Horton, Shimeng Wang, Brian C. Zelle, Holden James Yildirim, Jami Frances Tullius, Thomas Holladay Lind, Patrick James McNamara, Sridhar Kumar
  • Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations
    Patent number: 7656708
    Abstract: The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: February 2, 2010
    Assignee: Atmel Corporation
    Inventors: Stanley Hong, Jami Wang, Alan Chen
  • MEMORY ARCHITECTURE WITH ADVANCED MAIN-BITLINE PARTITIONING CIRCUITRY FOR ENHANCED ERASE/PROGRAM/VERIFY OPERATIONS
    Publication number: 20080031075
    Abstract: The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.
    Type: Application
    Filed: October 12, 2007
    Publication date: February 7, 2008
    Applicant: ATMEL CORPORATION
    Inventors: Stanley Hong, Jami Wang, Alan Chen
  • Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations
    Patent number: 7295485
    Abstract: The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: November 13, 2007
    Assignee: Atmel Corporation
    Inventors: Stanley Hong, Jami Wang, Alan Chen
  • Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations
    Publication number: 20070014179
    Abstract: The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Inventors: Stanley Hong, Jami Wang, Alan Chen
  • Display stand
    Patent number: D547755
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: July 31, 2007
    Assignee: Inventec Corporation
    Inventors: Dragon Wang, Jami Wang, Kelly Chuang
  • Display stand
    Patent number: D548227
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: August 7, 2007
    Assignee: Inventec Corporation
    Inventors: Dragon Wang, Jami Wang, Kelly Chuang