Patents by Inventor Jamie T. Stapleton

Jamie T. Stapleton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatus to reduce semiconductor wafer warpage in the presence of deep cavities
    Patent number: 9245855
    Abstract: Methods and apparatus for forming structures to reduce wafer warpage. A method includes providing a semiconductor wafer having a plurality of integrated circuits; providing a photomask defining a plurality of cavities to be formed by an etch on a backside surface of the semiconductor wafer; defining structural support areas for the backside surface, the structural support areas being contiguous areas; providing areas on the photomask that correspond to the structural support areas, the structural support areas being areas that are not to be etched; using the photomask, performing an etch on the backside surface of the semiconductor wafer to form the cavities by removing semiconductor material from the backside surface of the semiconductor wafer; and the structural supports on the backside of the semiconductor wafer formed as areas that are not subjected to the etch. Additional methods and apparatus are also disclosed.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: January 26, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Simon Y S Chang, Thomas W. Lassiter, Jamie T. Stapleton, Maciej Blasiak
  • Methods and Apparatus to Reduce Semiconductor Wafer Warpage in the Presence of Deep Cavities
    Publication number: 20150380363
    Abstract: Methods and apparatus for forming structures to reduce wafer warpage. A method includes providing a semiconductor wafer having a plurality of integrated circuits; providing a photomask defining a plurality of cavities to be formed by an etch on a backside surface of the semiconductor wafer; defining structural support areas for the backside surface, the structural support areas being contiguous areas; providing areas on the photomask that correspond to the structural support areas, the structural support areas being areas that are not to be etched; using the photomask, performing an etch on the backside surface of the semiconductor wafer to form the cavities by removing semiconductor material from the backside surface of the semiconductor wafer; and the structural supports on the backside of the semiconductor wafer formed as areas that are not subjected to the etch. Additional methods and apparatus are also disclosed.
    Type: Application
    Filed: March 31, 2015
    Publication date: December 31, 2015
    Inventors: Simon YS Chang, Thomas W. Lassiter, Jamie T. Stapleton, Maciej Blasiak