Abstract: A method for manufacturing a semiconductor device comprising at least a support body and a monocrystalline semiconductor body, in which both bodies are provided with at least one flat optically smooth surface obtained by means of bulk-reducing polishing (mirror polishing), and at least the semiconductor body is then provided at the optically smooth surface with an electrically insulating layer with at least the electrically insulating layer on the semiconductor body being subjected to a bonding-activating operation, whereupon both bodies after their flat surfaces have been cleaned, are contacted with each other in a dust-free atmosphere in order to obtain a rigid mechanical connection, after which they are subjected to a heat treatment of at least 250.degree. C., whereupon the semiconductor body is etched to a thin layer having a thickness lying between 0.05 and 100 .mu.m.

Abstract: Method of manufacturing a semiconductor device and semiconductor device manufactured by the use of such a method.The invention describes a method of contacting narrow regions, such as narrow polysilicon gates of a CCD having a width of, for example, 4 .mu.m. Poly 2 and poly 3 layers, which are required already for the other CCD phases, are used as etching masks having two contact openings of 4 .mu.m which are displaced both with respect to each other and with respect to the region to be contacted, so that it is possible to define a contact opening which is smaller than 4 .mu.m and is aligned accurately above the gate to be contacted. FIG. 4.

Abstract: Method of manufacturing a semiconductor device and semiconductor device manufactured by the use of such a method.A method of contacting narrow regions, such as narrow polysilicon gates of a CCD, having widths of, for example, 4 .mu.m. Upper layers, which are required for the CCD electrodes, are used as etching masks for contacts to the lower electrode layers. Two upper layers define two contact openings of 4 .mu.m which are displaced both with respect to each other and with respect to the region to be contacted. Therefore it is possible to define a contact opening which is smaller than 4 .mu.m and which is aligned accurately above the gate to be contacted.

Abstract: The invention discloses a compact construction of an n-channel surface MOS source follower in a p-pocket in an n-type substrate. The source is connected to the p-pocket in order to avoid feedback. The drain is connected to the substrate which acts as a supply line. This construction permits manufacturing several output amplifiers with a minimum pitch. The invention is of particular importance for CCD sensors.