Abstract: A clock recovery system includes a rough clock generator, which yields a rough clock signal, based upon logic level transitions exhibited by a data signal. The rough clock signal is supplied to a phase locked loop having an adjustable order of frequency response, an adjustable corner frequency, an adjustable natural frequency, and/or an adjustable damping factor. The clock recovery system includes control parameters that, when properly adjusted, suppress non-ideal effects of components within the clock recovery system, and also permit the frequency response of the phase locked loop to be returned to a desired response.

Abstract: A system is disclosed for precisely measuring time intervals, used to either characterize or diminish noise components in repetitive waveforms. An interval timer generates a whole number count of cycles in combination with beginning and ending ramps capable of resolving fractions of a cycle, to accurately register the time interval. Selection logic can be implemented to time either single periods or spans of multiple consecutive periods of the waveforms. Multiple time measurements are arranged in sets, each set corresponding to a different span of “N” consecutive periods over a range of values for N. A variance of each set is generated, and an array of variance vs N provides a function having properties of an auto-correlation function. Instrument jitter can be reduced based on measurements of period spans rather than individual periods, and is reduced in proportion to the increasing size of the measured span.

Abstract: A method, apparatus, and article of manufacture for separating the components of a jitter signal. The method includes the steps of obtaining measurements of the spans of a signal, generating variation measurements for each of the spans, transforming the variation estimates from a time domain to a frequency domain, and determining the random component and the periodic component of the jitter signal.

Abstract: A method, apparatus, and article of manufacture for separating the components of a jitter signal. The method includes the steps of obtaining measurements of the spans of a signal, generating variation measurements for each of the spans, transforming the variation estimates from a time domain to a frequency domain, and determining the random component and the periodic component of the jitter signal.

Abstract: A linear ramp generating and control circuit finding particular applicability in a time interval measurement system. The linear ramp circuit includes a hold capacitor which may be linearly discharged during one operating mode of the circuit by coupling a constant current source to the capacitor. The voltage on the hold capacitor is linearly discharged away from a baseline voltage level to a data voltage level which is subsequently passed to an analog-to-digital converter of the time interval measurement system for further processing. The hold capacitor voltage is returned to the baseline voltage level during a recovery mode of circuit operation by a recovery or recharge network. The recharge network may include an active-feedback circuit which implements an approximately second-order voltage response to the hold capacitor during the recovery mode of operation.

Abstract: A linear ramp generating and control circuit finding particular applicability in a time interval measurement system. The linear ramp circuit includes a hold capacitor which may be linearly discharged during one operating mode of the circuit by coupling a constant current source to the capacitor. The voltage on the hold capacitor is linearly discharged away from a baseline voltage level to a data voltage level which is subsequently passed to an analog-to-digital converter of the time interval measurement system for further processing. The hold capacitor voltage is returned to the baseline voltage level during a recovery mode of circuit operation by a recovery or recharge network. The recharge network may include an active-feedback circuit which implements an approximately second-order voltage response to the hold capacitor during the recovery mode of operation.

Abstract: A system is disclosed for precisely measuring time intervals, used to either characterize or diminish noise components in repetitive waveforms. An interval timer generates a whole number count of cycles in combination with beginning and ending ramps capable of resolving fractions of a cycle, to accurately register the time interval. Selection logic can be implemented to time either single periods or spans of multiple consecutive periods of the waveforms. Multiple time measurements are arranged in sets, each set corresponding to a different span of “N” consecutive periods over a range of values for N. A variance of each set is generated, and an array of variance vs N provides a function having properties of an auto-correlation function. Instrument jitter can be reduced based on measurements of period spans rather than individual periods, and is reduced in proportion to the increasing size of the measured span.

Abstract: A power supply for testing an integrated circuit includes a source voltage input terminal for receiving an input voltage. The power supply serves as both a DUT active power supply and an IDDQ measurement circuit, without the need for switching between separate DUT active power supply and IDDQ measurement circuits. In one embodiment, a current source output driver includes a diode across a current sensing resistor inside a feedback loop. This minimizes VDD changes when the DUT demands transient current, such as when loading IDDQ test vectors. Moreover, with decreased transient changes in VDD, dielectric absorption effects of a decoupling capacitor are reduced.

Abstract: An improved delay lock loop which has first and second means (32, 34) for generating a voltage ramp, the first ramp generator (32) providing a train of ramped inputs to first time delay means (38) responsive to a first input pulse train and the second ramp generator (34) providing a train of ramped inputs to a second time delay means (40) responsive to a second input pulse train. The ramp generators (32, 34) provide a highly linear voltage ramp. First and second retrace means (36A, 36B) are connected to the first and second ramp generators (32, 34) respectively and act to limit the ramps to a certain voltage, commanding the ramp generators (32, 34) to return to a reference voltage to await the succeeding input pulse edge transition. A further improvement comprises range switch means (44) that function to selectively control the maximum range of time delay which the delay lock loop is able to sense.