Abstract: High Bandwidth IJTAG Through High Speed Parallel Bus A system in a circuit comprises: a first network (710) configurable to transmit data in parallel in the circuit, the first network (710) comprising circuit block interface devices, each of the circuit block interface devices being coupled to ports of one of circuit blocks in the circuit; a plurality of second networks (720, 725, 727), each of the plurality of second networks (720, 725, 727) configurable to transmit data in serial in one of the circuit blocks in the circuit; a third network (730) configurable to transmit data in serial in the circuit when being coupled to the plurality of second networks (720, 725, 727); and a plurality of network switching interface devices (740, 745, 747), each of the plurality of network switching interface devices (740, 745, 747) configurable to couple either the first network (710) or the third network (730) to one of the plurality of second networks (720, 725, 727) based on a control signal stored in the each of the pl