Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: A test vehicle a system and method for evaluating an interconnect module manufacturing process while dynamically testing performance with high-speed operational frequencies is disclosed. The test vehicle incorporates a self-timed or gated speed circuit that can detect subtle resistive faults and also show the exact location in the array where the speed fault occurred based on test program data logs from scan flip flops. One embodiment incorporates a gated clock in the gated speed circuit producing gated data that delivers greater statistical properties with respect to Integrated Circuit Direct Drain Quiescent Current (IDDQ) testing.

Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: A system and method for collecting and analyzing optical inspection results obtained during the manufacturing process and comparing those results to actual functional results of a specially designed test vehicle integrated circuit. The test vehicle integrated circuit allows failures to be localized to very small areas, which allows more accurate correlation between inspection faults and functional failures. The correlation of inspection faults to actual functional failures is used to change the sensitivity settings for an optical inspection system to more accurately detect defects that are likely to be functional failures.

Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: A system and method for collecting and analyzing optical inspection results obtained during the manufacturing process and comparing those results to actual functional results of a specially designed test vehicle integrated circuit. The test vehicle integrated circuit allows failures to be localized to very small areas, which allows more accurate correlation between inspection faults and functional failures. The correlation of inspection faults to actual functional failures is used to change the sensitivity settings for an optical inspection system to more accurately detect defects that are likely to be functional failures.

Abstract: A method for inspecting the uniformity of the pressure applied between a conditioner and a polishing pad on a chemical mechanical polisher. A sheet of pressure sensitive material is placed between the conditioner and the polishing pad, and the conditioner is lowered onto the sheet of pressure sensitive material. A desired degree of pressure is applied between the conditioner and the polishing pad, thereby creating an impression in the sheet of pressure sensitive material, and the conditioner is lifted from the sheet of pressure sensitive material. The sheet of pressure sensitive material is inspected to determine the uniformity of the pressure applied between the conditioner and the polishing pad.

Abstract: A RAID 0 disk array has an optimizing algorithm for allocating the amount of data stored to each drive in a disk array. The algorithm allocates a proportion of the data for each stripe to the various disk drives based at least in part on the data transfer rate for each drive. The disk array may be constructed such that about half of the disk drives write to the outside tracks of the drives while the remaining disks write to the inside tracks. Using the algorithm, the minimum data transfer rate for the disk array may be maximized.

Abstract: A method for inspecting the uniformity of the pressure applied between a conditioner and a polishing pad on a chemical mechanical polisher. A sheet of pressure sensitive material is placed between the conditioner and the polishing pad, and the conditioner is lowered onto the sheet of pressure sensitive material. A desired degree of pressure is applied between the conditioner and the polishing pad, thereby creating an impression in the sheet of pressure sensitive material, and the conditioner is lifted from the sheet of pressure sensitive material. The sheet of pressure sensitive material is inspected to determine the uniformity of the pressure applied between the conditioner and the polishing pad.

Abstract: A test vehicle a system and method for evaluating an interconnect module manufacturing process while dynamically testing performance with high-speed operational frequencies is disclosed. The test vehicle incorporates a self-timed or gated speed circuit that can detect subtle resistive faults and also show the exact location in the array where the speed fault occurred based on test program data logs from scan flip flops. One embodiment incorporates a gated clock in the gated speed circuit producing gated data that delivers greater statistical properties with respect to Integrated Circuit Direct Drain Quiescent Current (IDDQ) testing.

Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.

Abstract: A RAID 0 disk array has an optimizing algorithm for allocating the amount of data stored to each drive in a disk array. The algorithm allocates a proportion of the data for each stripe to the various disk drives based at least in part on the data transfer rate for each drive. The disk array may be constructed such that about half of the disk drives write to the outside tracks of the drives while the remaining disks write to the inside tracks. Using the algorithm, the minimum data transfer rate for the disk array may be maximized.