Abstract: This application is directed to methods and systems of verifying integrated circuit including an irregular shaped transistor device. The irregular shaped transistor device has a gate, a source, a drain, and a first channel connecting the source and drain and having an irregular shape. An equivalent resistance of the first channel is determined based on the irregular shape of the first channel. A length of the first channel is determined optionally based on locations of the source and drain. An equivalent width of the first channel of the irregular shaped transistor device is determined based on the equivalent resistance and length of the first channel, thereby enabling representation of the irregular shaped transistor device, by a regular shaped transistor device having a second channel, in analysis of the integrated circuit. The second channel optionally has a rectangular shape measured by the equivalent width and the length of the first channel.

Abstract: Techniques are described for fabricating a pair of &bgr;-identical transistors, in other words, a pair of transistors whose dimensions and electrical characteristics, other than their respective gate electrode work functions, are substantially similar. In particular, the lengths of respective channel regions for the transistors are substantially the same, and portions of each gate electrode extending above a channel region include only dopants of a single conductivity type. The techniques can be incorporated into a standard CMOS process.

Abstract: Techniques are described for fabricating a pair of &bgr;-identical transistors, in other words, a pair of transistors whose dimensions and electrical characteristics, other than their respective gate electrode work functions, are substantially similar. In particular, the lengths of respective channel regions for the transistors are substantially the same, and portions of each gate electrode extending above a channel region include only dopants of a single conductivity type. The techniques can be incorporated into a standard CMOS process.