Patents by Inventor Jan Krellner

Jan Krellner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934240
    Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: March 19, 2024
    Assignee: Apple Inc.
    Inventors: Inder M. Sodhi, Achmed R. Zahir, Carmel Yamberger, Daniele Perretta, Jan Krellner, Ron Neuman, James S. Ismail, Keith Cox
  • Publication number: 20230376091
    Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.
    Type: Application
    Filed: May 18, 2022
    Publication date: November 23, 2023
    Inventors: Inder M. Sodhi, Achmed R. Zahir, Carmel Yamberger, Daniele Perretta, Jan Krellner, Ron Neuman, James S. Ismail, Keith Cox
  • Patent number: 11271773
    Abstract: The invention relates to an arrangement and a method performing data exchange between various integrated circuits, IC, (3,4,5,6,7) in an automotive control system wherein the data are exchanged by a bus and has the object to enable ASIL C/D system coverage and to tie various ICs (clocks, regulators, memory interfaces, sensor signal conditioners, power management ICs etc.) This is solved the data are exchanged by a bus being ASIL C/D compliant and forming a common protocol to exchange information among the integrated circuits (3,4,5,6,7). The method is solved by functions implemented within the bus as setting the frequency of operation; arbitrating roles of the integrated circuits as master or slave device; checking integrity of exchanged data; frame repetition; detecting bus stuck-at failure modes; filtering or denouncing failures and warnings from peripheral devices; detecting remote out of specification local clock; and monitoring and predicting system reliability and profiling maintenance events.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: March 8, 2022
    Assignee: Renesas Electronics America Inc.
    Inventors: Manjit Singh, Serge Di Matteo, Jan Krellner, Kenneth C. Kwok
  • Publication number: 20200127872
    Abstract: The invention relates to an arrangement and a method performing data exchange between various integrated circuits, IC, (3,4,5,6,7) in an automotive control system wherein the data are exchanged by a bus and has the object to enable ASIL C/D system coverage and to tie various ICs (clocks, regulators, memory interfaces, sensor signal conditioners, power management ICs etc.) This is solved the data are exchanged by a bus being ASIL C/D compliant and forming a common protocol to exchange information among the integrated circuits (3,4,5,6,7). The method is solved by functions implemented within the bus as setting the frequency of operation; arbitrating roles of the integrated circuits as master or slave device; checking integrity of exchanged data; frame repetition; detecting bus stuck- at failure modes; filtering or denouncing failures and warnings from peripheral devices; detecting remote out of specification local clock; and monitoring and predicting system reliability and profiling maintenance events.
    Type: Application
    Filed: June 14, 2018
    Publication date: April 23, 2020
    Inventors: Manjit SINGH, Serge Dl MATTEO, Jan KRELLNER, Kenneth C. KWOK
  • Patent number: 9136764
    Abstract: Power control systems and power control devices may include a power control chip having a power control module configured to generate a power stage control signal, and an external power stage having a timing control module. The timing control module may be configured to receive the power stage control signal and generate a timing control signal controlling at least one switch to regulate an output voltage of the external power stage. The power control device further includes an auto-configuration module configured to communicate with the external power stage and request auto-configuration information from the external power stage. A related method of auto-configuring a power control system includes communicating auto-configuration information between at least one external power stage of a power control system and a power control chip, and configuring a setting of the at least one external power stage of the power control system based on the auto-configuration information.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: September 15, 2015
    Assignee: Integrated Device Technology, Inc.
    Inventors: Jan Krellner, Stephen Ulbrich, Kenneth Kwok
  • Patent number: 9112410
    Abstract: Power control systems and power control devices may include a power control chip having a power control module configured to generate a power stage control signal, and at least one power stage having a timing control module that is physically separate from the power control module. The timing control module may be configured to receive the power stage control signal and generate a timing control signal controlling at least one switch to regulate an output voltage of the at least one power stage. A related method may include generating power stage control information indicating an offset between an output voltage and a desired regulated output voltage, transmitting the power stage control information between modules that are physically separate, and timing signals for controlling a switching converter to regulate the output voltage. A related method of auto-configuring a power control system is also disclosed.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: August 18, 2015
    Assignee: INTEGRATED DEVICE TECHNOLOGY, inc.
    Inventors: Stephen Ulbrich, Jack Cornish, Kenneth Kwok, Jan Krellner
  • Patent number: 8581659
    Abstract: Current sources, systems including the current source, and methods for regulating and/or controlling a circuit using the current source. The current source is generally configured to (i) receive a reference current, a bias voltage and a feedback/input current and (ii) provide an output current. The systems generally include the current source, a circuit directly or indirectly receiving the output current, a bias source/generator configured to provide the bias voltage, and a current reference configured to sink or source a predetermined amount of current from or to the output current. The method generally includes (a) applying a bias voltage to the current source, the current source receiving an input current and providing an output current; (b) sinking or sourcing a reference current from or to the output current; (c) applying the output of the current source directly or indirectly to a regulated circuit; and (d) providing the input current from the regulated circuit.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: November 12, 2013
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: Steven Ulbrich, Kenneth Kwok, Jan Krellner, Joon Park
  • Publication number: 20130278234
    Abstract: Power control systems and power control devices may include a power control chip having a power control module configured to generate a power stage control signal, and an external power stage having a timing control module. The timing control module may be configured to receive the power stage control signal and generate a timing control signal controlling at least one switch to regulate an output voltage of the external power stage. The power control device further includes an auto-configuration module configured to communicate with the external power stage and request auto-configuration information from the external power stage. A related method of auto-configuring a power control system includes communicating auto-configuration information between at least one external power stage of a power control system and a power control chip, and configuring a setting of the at least one external power stage of the power control system based on the auto-configuration information.
    Type: Application
    Filed: April 19, 2012
    Publication date: October 24, 2013
    Applicant: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Jan Krellner, Stephen Ulbrich, Kenneth Kwok
  • Publication number: 20130265022
    Abstract: Power control systems and power control devices may include a power control chip having a power control module configured to generate a power stage control signal, and at least one power stage having a timing control module that is physically separate from the power control module. The timing control module may be configured to receive the power stage control signal and generate a timing control signal controlling at least one switch to regulate an output voltage of the at least one power stage. A related method may include generating power stage control information indicating an offset between an output voltage and a desired regulated output voltage, transmitting the power stage control information between modules that are physically separate, and timing signals for controlling a switching converter to regulate the output voltage. A related method of auto-configuring a power control system is also disclosed.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 10, 2013
    Applicant: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Stephen Ulbrich, Jack Cornish, Kenneth Kwok, Jan Krellner
  • Patent number: 8456096
    Abstract: Circuits for regulating and/or controlling integrated circuits such as drivers and switching regulators generally include a first switch configured to control or regulate a current, voltage drop or voltage boost; a first regulator or driver configured to transmit first pulses to the first switch, the pulses having a first pulse width; and pulse width modulation circuitry configured to (i) reduce the first pulse width when a first thermal threshold is met and (ii) increase the first pulse width when a second thermal threshold is met, the second thermal threshold being less than the first thermal threshold.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: June 4, 2013
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Kenneth Kwok, Jan Krellner, Steven Ulbrich, Joon Park
  • Patent number: 8279144
    Abstract: Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 2, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bin Zhao, Jack W. Cornish, Brian B. Horng, Andrew M Kameya, Jan Krellner, Kenneth C. Kwok, Victor K. Lee, Weizhuang W. Xin
  • Patent number: 8035315
    Abstract: Power management in a light emitting diode (LED) system having a plurality of LED strings is disclosed. A voltage source provides an output voltage to drive a plurality of LED strings. An LED driver implements a feedback mechanism to monitor the tail voltages of the active LED strings to identify the minimum tail voltage and adjust the output voltage of the voltage source based on the lowest tail voltage. A loop calibration module of the LED driver calibrates the feedback mechanism of the LED driver based on a relationship between a digital code value used to generate a particular output voltage and another digital code value generated based on the minimum tail voltage resulting from the particular output voltage.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: October 11, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bin Zhao, Jack W. Cornish, Brian B. Horng, Andrew M. Kameya, Jan Krellner, Kenneth C. Kwok, Victor K. Lee, Weizhuang W. Xin
  • Publication number: 20110193542
    Abstract: The present invention provides circuits and methods for regulating and/or controlling integrated circuits such as drivers and switching regulators. The circuit generally includes a first switch configured to control or regulate a current, voltage drop or voltage boost; a first regulator or driver configured to transmit first pulses to the first switch, the pulses having a first pulse width; and pulse width modulation circuitry configured to (i) reduce the first pulse width when a first thermal threshold is met and (ii) increase the first pulse width when a second thermal threshold is met, the second thermal threshold being less than the first thermal threshold.
    Type: Application
    Filed: June 15, 2010
    Publication date: August 11, 2011
    Inventors: Kenneth KWOK, Jan Krellner, Steven Ulbrich, Joon Park
  • Publication number: 20110181256
    Abstract: Current sources, systems including the current source, and methods for regulating and/or controlling a circuit using the current source. The current source is generally configured to (i) receive a reference current, a bias voltage and a feedback/input current and (ii) provide an output current. The systems generally include the current source, a circuit directly or indirectly receiving the output current, a bias source/generator configured to provide the bias voltage, and a current reference configured to sink or source a predetermined amount of current from or to the output current. The method generally includes (a) applying a bias voltage to the current source, the current source receiving an input current and providing an output current; (b) sinking or sourcing a reference current from or to the output current; (c) applying the output of the current source directly or indirectly to a regulated circuit; and (d) providing the input current from the regulated circuit.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Inventors: Steven Ulbrich, Kenneth Kwok, Jan Krellner, Joon Park
  • Patent number: 7804283
    Abstract: According to an exemplary embodiment, a method includes the step (910) of driving a buck section of a DC/DC converter with a buck signal that has a buck duty cycle and concurrently with driving the buck section, driving a boost section of the DC/DC converter with a boost signal that has a boost duty cycle, a difference existing between the buck duty cycle and the boost duty cycle. The method also includes the step (920) of monitoring an input voltage that is coupled to the buck section for a change in the input voltage, and in response to a change in the input voltage, the step (930) of changing the buck duty cycle and the boost duty cycle such that the difference between the buck duty cycle and the boost duty cycle is substantially constant.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: September 28, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jan Krellner, Sanjaya Maniktala
  • Publication number: 20100156315
    Abstract: Power management in a light emitting diode (LED) system having a plurality of LED strings is disclosed. A voltage source provides an output voltage to drive a plurality of LED strings. An LED driver implements a feedback mechanism to monitor the tail voltages of the active LED strings to identify the minimum tail voltage and adjust the output voltage of the voltage source based on the lowest tail voltage. A loop calibration module of the LED driver calibrates the feedback mechanism of the LED driver based on a relationship between a digital code value used to generate a particular output voltage and another digital code value generated based on the minimum tail voltage resulting from the particular output voltage.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Bin Zhao, Jack W. Cornish, Brian B. Horng, Andrew M. Kameya, Jan Krellner, Kenneth C. Kwok, Victor K. Lee, Weizhuang W. Xin
  • Publication number: 20100026203
    Abstract: Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Bin Zhao, Jack W. Cornish, Brian B. Horng, Andrew M. Kameya, Jan Krellner, Kenneth C. Kwok, Victor K. Lee, Weizhuang W. Xin
  • Publication number: 20090174366
    Abstract: Multiple Function Switching Regulator for Use in Mobile Electronic Devices A mobile electronic device operable to employ a rechargeable battery as a power source includes a peripheral port suitable for connecting an external device to the mobile electronic device and a power management device operable in a first mode as a battery charger to recharge the battery from an external power source and further operable in a second mode as a boost converter to power the external device from battery supplied power where the boost converter and the battery charger are provided by a single switching-converter.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 9, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Baher A. Ahmad, Timothy J. Herklots, Jan Krellner
  • Publication number: 20090045786
    Abstract: According to an exemplary embodiment, a method includes the step (910) of driving a buck section of a DC/DC converter with a buck signal that has a buck duty cycle and concurrently with driving the buck section, driving a boost section of the DC/DC converter with a boost signal that has a boost duty cycle, a difference existing between the buck duty cycle and the boost duty cycle. The method also includes the step (920) of monitoring an input voltage that is coupled to the buck section for a change in the input voltage, and in response to a change in the input voltage, the step (930) of changing the buck duty cycle and the boost duty cycle such that the difference between the buck duty cycle and the boost duty cycle is substantially constant.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 19, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jan Krellner, Sanjaya Maniktala
  • Patent number: 6993693
    Abstract: An analogue/digital interface circuit is disclosed in which an integral bistable circuit has its state changed by the arrival of an incoming analogue signal, however transient, and irrespective of when it arrives relative to the clock signal driving the digital circuit. The use of a bistable (flip-flop) circuit enables each parth of the interface circuit to be traversed when scan test signals are applied to it. Concurrently with the application of such signals, an inhibition signal is applied to the analogue signal inlet to prevent the arrival of any subsequency analogue signals from changing the state of the signal-storage element.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: January 31, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael Fitchett, Jan Krellner