Patents by Inventor Jan Krzys Wegrzyn

Jan Krzys Wegrzyn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10339041
    Abstract: Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: July 2, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Venkat Rangan, Jan Krzys Wegrzyn, Jeffrey Alexander Levin, John Paul Daniels
  • Patent number: 9886663
    Abstract: A method of generating executable code for a target platform in a neural network includes receiving a spiking neural network description. The method also includes receiving platform-specific instructions for one or more target platforms. Further, the method includes, generating executable code for the target platform(s) based on the platform-specific instructions and the network description.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Anthony Sarah, Robert Howard Kimball, Michael-David Nakayoshi Canoy, Jan Krzys Wegrzyn
  • Patent number: 9342782
    Abstract: A method of operating a spiking neural network having neurons coupled together with a synapse includes monitoring a timing of a presynaptic spike and monitoring a timing of a postsynaptic spike. The method also includes determining a time difference between the postsynaptic spike and the presynaptic spike. The method further includes calculating a stochastic update of a delay for the synapse based on the time difference between the postsynaptic spike and the presynaptic spike.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: May 17, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jan Krzys Wegrzyn, Regan Blythe Towal, Benjamin Samuel Schwartz
  • Patent number: 9311596
    Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Methods for managing memory in a processing system are described whereby memory can be allocated among a plurality of elements and rules configured for each element such that the parallel execution of the spiking networks is most optimal.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: April 12, 2016
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Eugene M. Izhikevich, Botond Szatmary, Csaba Petre, Filip Piekniewski, Michael-David Nakayoshi Canoy, Robert Howard Kimball, Jan Krzys Wegrzyn
  • Publication number: 20150242744
    Abstract: A method of operating a spiking neural network having neurons coupled together with a synapse includes monitoring a timing of a presynaptic spike and monitoring a timing of a postsynaptic spike. The method also includes determining a time difference between the postsynaptic spike and the presynaptic spike. The method further includes calculating a stochastic update of a delay for the synapse based on the time difference between the postsynaptic spike and the presynaptic spike.
    Type: Application
    Filed: March 27, 2014
    Publication date: August 27, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Jan Krzys WEGRZYN, Regan Blythe TOWAL, Benjamin Samuel SCHWARTZ
  • Publication number: 20150106317
    Abstract: Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
    Type: Application
    Filed: August 5, 2014
    Publication date: April 16, 2015
    Inventors: Venkat Rangan, Jan Krzys Wegrzyn, Jeffrey Alexander Levin, John Paul Daniels
  • Publication number: 20150100529
    Abstract: A method of generating executable code for a target platform in a neural network includes receiving a spiking neural network description. The method also includes receiving platform-specific instructions for one or more target platforms. Further, the method includes, generating executable code for the target platform(s) based on the platform-specific instructions and the network description.
    Type: Application
    Filed: November 20, 2013
    Publication date: April 9, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Anthony SARAH, Robert Howard KIMBALL, Michael-David Nakayoshi CANOY, Jan Krzys WEGRZYN
  • Publication number: 20100158161
    Abstract: The present patent application discloses a method and apparatus for decoding, comprising decoding signals iteratively, mutually exchanging extrinsic information, calculating APP LLRs for both systematic and parity bits and making a hard decision after a plurality of iterations is completed based on accumulated soft information. The present patent application also discloses a method and apparatus for post decoding soft interference canceling, comprising generating updated a posteriori probabilities for systematic and parity bits from a turbo decoder, mapping the posteriori probabilities to soft symbols, quantizing the soft symbols, re-encoding a data packet, filtering a chip sequence, reconstructing an interference waveform, and scaling reconstruction filter coefficients using the symbols.
    Type: Application
    Filed: June 18, 2009
    Publication date: June 24, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Sharad D. Sambhwani, Wei Zeng, Wei Zhang, Jan Krzys Wegrzyn, Mehraban Iraninejad