Patents by Inventor Jan Mancelita

Jan Mancelita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624393
    Abstract: Methods for localized thinning of wafers used in semiconductor devices and the structures formed from such methods are described. The methods thin localized areas of the backside of the semiconductor wafer to form recesses with a bi-directional channel design that is repeated within the wafer (or die) so that no straight channel line crosses the wafer (or die). The bi-directional pattern design keeps the channels from being aligned with the crystal orientation of the wafer. The recesses are then filled by a solder ball drop process by dropping proper size solder balls into the recesses and then annealing the wafer to reflow the solder balls and flatten them out. The reflow process begins to fill in the recesses from the bottom up, thereby avoiding void formation and the resulting air traps in the reflowed solder material. Other embodiments are also described.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: January 7, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Suku Kim, James Murphy, Matthew Reynolds, Romel Manatad, Jan Mancelita, Michael Gruenhagen