Patents by Inventor Jan Obrzut

Jan Obrzut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10261032
    Abstract: A noncontact resonameter includes: a resonator to: produce an excitation signal including a field; subject a sample to the excitation signal; produce a first resonator signal in a presence of the sample and the excitation signal, the first resonator signal including: a first quality factor of the resonator; a first resonance frequency of the resonator; or a combination thereof, the first resonator signal occurring in an absence of contact between the sample and the resonator; and produce a second resonator signal in a presence of the excitation signal and an absence of the sample, the second resonator signal including: a second quality factor of the resonator; a second resonance frequency of the resonator; or a combination thereof; a circuit in electrical communication with the resonator to receive the first resonator signal and the second resonator signal; and a continuous feeder to: provide the sample proximate to the resonator; dispose the sample intermediately in the field of the excitation signal during
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: April 16, 2019
    Assignee: NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY
    Inventors: Nathan Daniel Orloff, Christian John Long, Jan Obrzut
  • Publication number: 20160161424
    Abstract: A noncontact resonameter includes: a resonator to: produce an excitation signal including a field; subject a sample to the excitation signal; produce a first resonator signal in a presence of the sample and the excitation signal, the first resonator signal including: a first quality factor of the resonator; a first resonance frequency of the resonator; or a combination thereof, the first resonator signal occurring in an absence of contact between the sample and the resonator; and produce a second resonator signal in a presence of the excitation signal and an absence of the sample, the second resonator signal including: a second quality factor of the resonator; a second resonance frequency of the resonator; or a combination thereof; a circuit in electrical communication with the resonator to receive the first resonator signal and the second resonator signal; and a continuous feeder to: provide the sample proximate to the resonator; dispose the sample intermediately in the field of the excitation signal during
    Type: Application
    Filed: December 3, 2015
    Publication date: June 9, 2016
    Inventors: NATHAN DANIEL ORLOFF, IV, CHRISTIAN JOHN LONG, JAN OBRZUT
  • Patent number: 7070909
    Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: July 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Lynn Potter
  • Publication number: 20050026051
    Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Applicant: International Business Machines Corporation
    Inventors: Robert Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Potter
  • Patent number: 6838400
    Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: January 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert Maynard Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Lynn Potter
  • Patent number: 6207595
    Abstract: A fabric material and method of its manufacture suitable for use in electronic packages including chip carriers. High insulation resistance is exhibited when subjected to high temperatures and humidity stress conditions.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: March 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bernd K. Appelt, Lawrence R. Blumberg, William T. Fotorny, Ross D. Havens, Robert M. Japp, Kostas Papathomas, Jan Obrzut, Mark D. Poliks, Amarjit S. Rai
  • Patent number: 6191952
    Abstract: Flip-chip electronic packages are provided with a compliant surface layer, normally positioned between an underfill layer and a substrate such as a chip carrier or a printed circuit board or card, which reduces stress and strain resulting from differences in coefficients of thermal expansion between the chip and substrate. The compliant layer, which should have a storage modulus of less than ½ the modulus of the substrate, preferably between about 50,000 psi and about 20,000 psi, may comprise rubbery materials such as silicone, virco-plastic polymers such as polytetrafluoroethylene or interpenetrating polymer networks (IPNs). Photosensitive IPNs used for solder marks are preferred.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Miquel A. Jimarez, Eric A. Johnson, Li Li, Jan Obrzut
  • Patent number: 5786700
    Abstract: A process determines a linear interconnection resistance R between two external access points of an electronic device. The device comprises a chip, a chip carrier and wiring between the chip and carrier. The chip comprises an ESD device such as a diode which is electrically connected between the two access points. To begin the process, various currents are injected from one of the access points to another and corresponding voltages are measured across the two access points. Alternately, various voltages are applied from one access point to the other and corresponding currents are measured. The applied voltages and injected currents all forward bias the ESD device. These current-voltage relationships are applied to an interconnection model algorithm to yield the interconnection resistance.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: July 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Keh-Chee Jen, Jan Obrzut