Abstract: Embodiments of a method, an IC device, and a circuit board are disclosed. In an embodiment, the method involves at an IC device of the system, monitoring activity on a bus interface of the IC device, wherein the bus interface is connected to a bus on the system that communicatively couples the IC device to at least one other IC device on the system, applying machine learning to data corresponding to the monitored activity to generate an activity profile, monitoring subsequent activity on the bus interface of the IC device, comparing data corresponding to the to subsequently monitored activity to the machine learning generated activity profile to determine if a system-level Trojan is detected, and generating a notification when it is determined from the comparison that a system-level Trojan has been detected.

Abstract: An example apparatus includes a circuit and calibration circuitry. The circuit has complementary input ports to receive input signals including a monotonously rising and/or falling wave reference signal and a voltage-test signal to test at least one direct current (DC) voltage associated with the circuit by comparing the input signals using a first polarity and second polarity associated with the circuit to produce a first output signal and a second output signal. During operation, the circuit manifests an input voltage offset and a signal delay with each comparison of the input signals. The calibration circuitry processes the first and second output signals and, in response, calibrates or sets an adjustment for at least one signal path associated with the circuit in order to account for the input offset voltage and signal delay during normal operation of the circuit.

Abstract: A device, computer program and computer-implemented method for machine learning. The method comprises providing a task comprising an action space of a multi-armed bandit problem or a contextual bandit problem and a distribution over rewards that is conditioned on actions, providing a hyperprior, wherein the hyperprior is a distribution over the action space, determining, depending on the hyperprior, a hyperposterior for that a lower bound for an expected reward on future bandit tasks has as large a value as possible, when using priors sampled from the hyperposterior, and wherein the hyperposterior is a distribution over the action space.

Abstract: The present disclosure relates to a density meter for slurry which is transported through a pipe, the density meter may include a frame; a pipe part; flexible pipe couplings arranged between the frame and either end of the pipe part for coupling the pipe part to the frame and to a feed pipe and a discharge pipe; a first accelerometer arranged on the pipe part for measuring the accelerations of the pipe part; an actuator arranged between the pipe part and the frame for imparting force on the pipe; a controller for controlling the actuator; and a computing means having a mathematical model to ultimately calculate the density of the slurry in the pipe part.

Abstract: Provided are antibodies that specifically bind Vaccinia Virus (VV) A56 or B5 antigen. Also provided are fusion proteins and conjugates that comprise the antibodies. Pharmaceutical compositions and kits that comprise the antibodies, fusion proteins and conjugates are also provided. Aspects of the present disclosure further include methods of using the antibodies, fusion proteins and conjugates, e.g., for therapeutic purposes. In certain embodiments, provided are methods that comprise administering an antibody, fusion protein or conjugate of the present disclosure to an individual having cancer, wherein the individual comprises cancer cells infected with VV, and wherein the antibody, fusion protein or conjugate is targeted to the infected cancer cells by VV antigens expressed on the surface of the infected cancer cells.

Abstract: Embodiments combine error correction code (ECC) and transparent memory built-in self-test (TMBIST) for memory fault detection and correction. An ECC encoder receives input data and provides ECC data for data words stored in memory. Input XOR circuits receive the input data and output XOR'ed data as payload data for the data words. Output XOR circuits receive the payload data and output XOR'ed data. An ECC decoder receives the ECC data and the XOR'ed output data and generates error messages. Either test data from a controller running a TMBIST process or application data from a processor executing an application is selected as the input data. Either test address/control signals from the controller or application address/control signals from the processor are selected for memory access. During active operation of the application, memory access is provided to the processor and the controller, and the memory is tested during the active operation.

Abstract: The invention relates to a method for automatically setting at least one parameter of an actuator control system which is designed to control a control variable of an actuator to a predefinable setpoint. The actuator control system is designed to generate a control variable depending on the at least one parameter, the setpoint and the control variable and to actuate the actuator depending on this control variable. A new value of the at least one parameter is determined depending on a stationary probability distribution of the control variable, and the parameter is then set to this new value.

Abstract: The present invention relates to a drive mechanism for a drug delivery device, comprising: a piston rod to operably engage with a piston of a cartridge to displace the piston in a distal direction during a dose dispensing action, at least one actuation member mechanically coupled with the piston rod to induce a distally directed displacement of the piston rod when actuated by a user, a control to ascertain at least one predefined condition of use, and at least one interlock member coupled with the control to mechanically obstruct displacement of the piston rod if the condition of use is not fulfilled.

Abstract: Aspects of the present disclosure are directed to a photonic integrated circuit (PIC) having a resistivity-engineered substrate to suppress radio-frequency (RF) common-mode signals. In some embodiments, a semiconductor substrate is provided that comprises two portions having different levels of resistivity to provide both suppression of common mode signals, and reduction of RF absorption loss for non-common mode RF signals. In such embodiments, a bottom portion of the semiconductor substrate has a low resistivity to suppress common mode via RF absorption, while a top portion of the semiconductor substrate that is adjacent to conductors in the IC has a high resistivity to reduce RF loss.

Abstract: The invention is directed to antibacterial compositions comprising bacteria modified to comprise phasmids engineered to deliver of CRISPR RNAs and methods for their use.

Abstract: A mobile accommodation, such as a caravan or camper, comprises a wall with a wall opening (5) in which a framed window (2,4) is arranged. The framed window comprises a casing frame (20) which drops with a flanged edge (25) over an, edge part of the wall (10) and which is fixed on an opposite side in the wall opening (5) by mounting clamps (40). These mounting clamps (40) further comprises a snap member (42) for a snapping engagement in a snap cavity (33) of a framework (30) arranged on an inner side.

Abstract: A power converter is capable to convert an electrical input power into a bipolar output power and to deliver the bipolar output power to at least two independent plasma processing chambers. The power converter includes: a power input port for connection to an electrical power delivering grid, at least two, preferably more than two, power output ports each for connection to one of the plasma process chambers, and a controller configured to control the power converter to deliver the bipolar output power to the power output ports, using one or more control parameters selected from a list comprising: power, voltage, current, excitation frequency, and threshold for protective measures, such that at least one of the control parameters at a first power output port is different from the corresponding control parameter at a different power output port.

Abstract: The disclosure relates to a method and system for memory testing to detect memory errors during operation of a memory module. Example embodiments include a method of detecting an error in a memory module (101), the method comprising the sequential steps of: i) receiving (302) a request from a processor executing an application for a read or write operation at a location of the memory module (101) identified by an address; ii) outputting data (304) from, or writing to, the location of the memory module (101); iii) generating (306) by an error detection module (102) a further read request for the location of the memory module (101) identified by the address; iv) receiving (307) at the error detection module (102) an error correction code from the memory module (101) for the location identified by the address; and vi) providing (311) by the error detection module (102) an alert output for the address if the error correction code indicates an error.

Abstract: Some aspects of the present disclosure relate to a drive mechanism for a drug delivery device. The drive mechanism includes: a piston rod to operably engage with a piston of a cartridge to displace the piston in a distal direction during a dose dispensing action, at least one actuation member mechanically coupled with the piston rod to induce a distally directed displacement of the piston rod when actuated by a user, a control to ascertain at least one predefined condition of use, and at least one interlock member coupled with the control to mechanically obstruct displacement of the piston rod if the condition of use is not fulfilled.

Abstract: The disclosure relates to detecting jitter in phase locked loop (PLL) circuits. Embodiments disclosed include a phase-locked loop, PLL (500) comprising: a phase comparison module (201); a loop filter (102); a voltage controller oscillator, VCO (103); a feedback divider (104); and a jitter evaluation module (502), the phase comparison module (201) comprising a phase comparator (202) and a measurement module (204) configured to detect a metastable output in the phase comparator (202) over active clock cycles of application and feedback clock signals (105, 106) input to the phase comparison module (201) and provide an output signal (208) to the jitter evaluation module (502) indicating a metastability resolution time for the phase comparator (202), the jitter evaluation module (210) being configured to provide an output indicative of jitter based on the metastability resolution time.

Abstract: According to certain examples, a circuit-based wireless communications system provides secure access to a vehicle by way of certain circuitry configure to compare a first RF background observed for a vehicle-located RF receiver that is part of a vehicle-located circuit secured to a vehicle, with a second RF background observed for a wireless-communications vehicle-access circuit that includes another RF receiver. In response, a distance metric is generated to indicate a degree of similarity between the first RF background and the second RF background, and based on whether this metric satisfies a threshold, access to the vehicle may be granted via the wireless-communications vehicle-access circuit.

Abstract: An apparatus is provided, connectable to a memory and one or more peripherals. The apparatus includes translation request circuitry to receive a translation request from one of the peripherals to translate an input address within an input domain to an output address within an output domain. Signing circuitry generates a signature of at least part of the output address using a private key. Translation response circuitry responds to the translation request by transmitting to the one of the peripherals a translation response, including the output address and the signature. Gateway circuitry receives access requests to the memory. Each of the access requests comprises a desired memory address in the output domain and a signature of the desired memory address. The gateway performs validation of the signature of the desired memory address using the private key and in response to the validation of a given access request failing, performs an error action.

Abstract: A method for securing an integrated circuit chip includes obtaining a first value from a first storage area in the chip, obtaining a second value from a second storage area in the chip, generating a third value based on the first value and the second value, and converting a first opcode command obfuscated as a second opcode command into a non-obfuscated form of the first opcode command based on the third value. The first value corresponds to a physically unclonable function (PUF) of the chip. The second value is a key including information indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command. The third value may be an inversion flag indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command.

Abstract: Communicating information through a user platform by representing, on a user platform visual display, spatial publishing objects as entities at locations within a three-dimensional spatial publishing object space. Each spatial publishing object associated with information, and each presenting a subset of the associated information. Establishing a user presence at a location within the spatial publishing object space. The user presence, in conjunction with a user point-of-view, being navigable by the user in at least a two-dimensional sub-space of the spatial publishing object space.

Abstract: Disclosed herein are gastrointestinal tract (G1) bacteria and methods for treating or preventing an irradiation-induced intestinal damage in a subject, the methods comprising administering a G1 bacterium to the subject, wherein the G1 bacterium comprises a vector that comprises a polynucleotide encoding IL-22 and/or IFN-P, or a functional fragment thereof.