Patents by Inventor Jan-Shian Shiao

Jan-Shian Shiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system of testing a chip
    Patent number: 6483338
    Abstract: A method and system of testing a chip for testing a circuit module in the chip. The system is integrated into the chip. The reference clock and the test command are sent to the testing system serially. The testing system, in response to the test command, performs test actions on the circuit module, producing a test result. The test result is serially sent to the test machine.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: November 19, 2002
    Assignee: VIA Technologies, Inc.
    Inventors: Chih-Hsien Weng, Jan-Shian Shiao, Wen-Hsu Huang
  • Method and system of testing a chip
    Publication number: 20010050575
    Abstract: A method and system of testing a chip for testing a circuit module in the chip. The system is integrated into the chip. The reference clock and the test command are sent to the testing system serially. The testing system, in response to the test command, performs test actions on the circuit module, producing a test result. The test result is serially sent to the test machine.
    Type: Application
    Filed: December 13, 2000
    Publication date: December 13, 2001
    Inventors: Chih-Hsien Weng, Jan-Shian Shiao, Wen-Hsu Huang