Patents by Inventor Jan Slotboom

Jan Slotboom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8981442
    Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: March 17, 2015
    Assignee: NXP B.V.
    Inventors: Victor Zieren, Anco Heringa, Olaf Wunnicke, Jan Slotboom, Robert Hendrikus Margaretha van Veldhoven, Jan Claes
  • Publication number: 20140347135
    Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Adrianus Maria Hurxk, Tony Vanhoucke, Jan Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Publication number: 20140175528
    Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.
    Type: Application
    Filed: December 16, 2013
    Publication date: June 26, 2014
    Applicant: NXP B.V.
    Inventors: Victor Zieren, Anco Heringa, Olaf Wunnicke, Jan Slotboom, Robert Hendrikus Margaretha van Veldhoven, Jan Claes
  • Publication number: 20060202229
    Abstract: The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1).
    Type: Application
    Filed: February 12, 2004
    Publication date: September 14, 2006
    Inventors: Rob Van Dalen, Prabhat Agarwal, Jan Slotboom, Gerrit Koops
  • Publication number: 20050280011
    Abstract: The invention relates to a radiation-emitting semiconductor device (10) with a semiconductor body (1) and a substrate (2), wherein the semiconductor body (1) comprises a vertical bipolar transistor with an emitter region (3), a base region (4) and a collector region (5), which regions are each provided with a connection region (6, 7, 8), and the border between the base region (4) and the collector region (5) forms a pn-junction and, in operation, at a reverse bias of the pn-junction or at a sufficiently large collector current, avalanche multiplication of charge carriers occurs whereby radiation is generated in the collector region (5). According to the invention, the collector region (5) has a thickness through which transmission of the generated radiation occurs, and the collector region (5) borders on a free surface of the semiconductor body (1).
    Type: Application
    Filed: October 28, 2003
    Publication date: December 22, 2005
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Johan Klootwijk, Jan Slotboom
  • Publication number: 20050001288
    Abstract: The invention relates to a semiconductor device with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2), and a collector region (3), which are provided with respectively a first, a second, and a third connection conductor (4, 5, 6), while the bandgap of the base region (2) is lower than that of the collector region (3) or of the emitter region (1), for example owing to the use of a silicon-germanium alloy instead of pure silicon. Such a device is very fast, but its transistor shows a relatively low BVceo. In a device according to the invention, the emitter region (1) or the base region (2) comprises a sub-region (1B, 2B) with a reduced doping concentration, which sub-region (1B, 2B) is provided with a further connection conductor (4B,5B) which forms a Schottky junction with the sub-region (1B, 2B). Such a device results in a transistor with a particularly high cut-off frequency fT but with no or hardly any reduction of the BVceo.
    Type: Application
    Filed: November 21, 2002
    Publication date: January 6, 2005
    Inventors: Raymond Hueting, Jan Slotboom, Leon Van Den Oever