Patents by Inventor Jan SUNDERMEYER

Jan SUNDERMEYER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11843418
    Abstract: A method and apparatus that cancels or reduces DC offset in a fully-differential optical receiver. The method includes receiving differential optical signals, converting, with photodetectors, the differential optical signals to differential current signals representative of the differential optical signals, converting, using a transimpedance amplifier, the differential current signals to differential intermediate voltage signals, amplifying, using a main amplifier, the differential intermediate voltage signals to generate differential output voltage signals, and cancelling a DC component of the differential output voltage signals using a fully differential DC cancellation circuit. Output offset may also be cancelled or reduced using digital control.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: December 12, 2023
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Daniel Micusik, Sachidanandam Sundarraju, Jan Sundermeyer, Juergen Hauenschild
  • Publication number: 20230084591
    Abstract: A method and apparatus that cancels or reduces DC offset in a fully-differential optical receiver. The method includes receiving differential optical signals, converting, with photodetectors, the differential optical signals to differential current signals representative of the differential optical signals, converting, using a transimpedance amplifier, the differential current signals to differential intermediate voltage signals, amplifying, using a main amplifier, the differential intermediate voltage signals to generate differential output voltage signals, and cancelling a DC component of the differential output voltage signals using a fully differential DC cancellation circuit. Output offset may also be cancelled or reduced using digital control.
    Type: Application
    Filed: September 16, 2021
    Publication date: March 16, 2023
    Inventors: Daniel Micusik, Sachidanandam Sundarraju, Jan Sundermeyer, Juergen Hauenschild
  • Patent number: 10164636
    Abstract: Embodiments of the present invention provide a level converter circuit with a resistor and a current adjustment circuit. The resistor is connected between an input and an output of the level converter circuit. The current adjustment circuit is configured to influence a current through the resistor such that an output voltage of the level converter circuit does not exceed a maximum allowable value.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 25, 2018
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Jan Sundermeyer, Norbert Weber
  • Publication number: 20160218714
    Abstract: Embodiments of the present invention provide a level converter circuit with a resistor and a current adjustment circuit. The resistor is connected between an input and an output of the level converter circuit. The current adjustment circuit is configured to influence a current through the resistor such that an output voltage of the level converter circuit does not exceed a maximum allowable value.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Inventors: Jan SUNDERMEYER, Norbert WEBER
  • Publication number: 20160072646
    Abstract: An apparatus with two pairs of lines including a first and second channel further includes a phantom channel that is implemented to provide a third channel without physically installing lines. Based on a differential signal, a first common-mode signal level is generated at a first output of a differential amplifier circuit, and a second common-mode signal level on a second output, and the first common-mode signal level is applied to the lines of the first pair of lines and the second common-mode signal level to the lines of the second pair of lines. An extraction circuit is implemented to extract common-mode portions on the lines of the first pair of lines and the lines of the second pair of lines.
    Type: Application
    Filed: November 17, 2015
    Publication date: March 10, 2016
    Inventors: Jan SUNDERMEYER, Norbert WEBER