Patents by Inventor Jan T. J. Bosiers

Jan T. J. Bosiers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6654059
    Abstract: A charge coupled imaging device includes a matrix of elements for converting an image projected onto the matrix into a frame of charge packets, along with a system of vertical charge transport channels (3) and a horizontal read-out register (C). A structure is provided for dumping unnecessary lines into a removal region in a certain operating mode. These lines are dumped at the transition between the imaging section and the memory section. The imaging device includes an imaging section (A) and a separate memory section (B) as well as a removal region (12) situated below the matrix as an anti-blooming provision. Unnecessary lines may be dumped, for example, into the substrate in that the transport in the imaging section is continued during frame transport while at the same time the transport in the memory section is stopped.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: November 25, 2003
    Assignee: Dalsa Corporation
    Inventors: Edwin Roks, Jan T. J. Bosiers, Alouisius W. M. Korthout, Peter Opmeer
  • Patent number: 5856846
    Abstract: In charge-coupled imaging devices it is generally necessary to provide zones (12) in the matrix with a contact. These zones may form part, for example, of a mechanism for draining charge, for example as a protection against overexposure. In the case of imaging devices with a horizontal readout register on one side of the matrix, these contacts can be provided on the opposite side. However, it is often desirable or even necessary, as in the case of imaging devices with four-quadrant readout, to provide such contacts on the same side as the horizontal readout register. To this end, a dummy line (14'-17') is provided in accordance with the invention between the matrix and the horizontal readout register (6), said dummy line having an electrode structure which leaves room for contact windows (22) to the zones (12).
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: January 5, 1999
    Assignee: U.S. Philips Corporation
    Inventors: Jan T.J. Bosiers, Bartholomeus G.M.H. Dillen
  • Patent number: 5442208
    Abstract: It is known to reduce the leakage current or dark current in charge-coupled devices with buried channels such as, for example, charge-coupled imaging devices by bringing the surface to the inverted state. In such a device, however, it is not possible to empty the channel completely locally in usual manner in that the charge is drained off through the substrate by means of a voltage pulse applied to the gates (charge reset). To be able to carry out charge reset nevertheless, the voltage pulse is applied between the substrate and the intermediate zone interposed between the substrate and the CCD channel. Since this voltage pulse is active over the entire range of the device, the device also prevents charge from being removed in locations where this is not desired when the pulse is applied.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: August 15, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Jan T. J. Bosiers, Edwin Roks, Agnes C. M. Kleimann
  • Patent number: 5388137
    Abstract: It is known to bring the surface into the inverted state in CCD imaging devices with buried channels during the integration period in order to keep the dark current low (All Gates Pinning). The desired potential profile, with wells in which the charge is integrated bounded by potential beers, is obtained through the use of a two-phase structure with a doping profile in the channel or with a gate oxide having thickness differences. Owing to limiting conditions which hold for the clock voltages used for charge transport, serious limitations are imposed on the depth of the potential wells and thus also on the charge storage capacity of the pixels. This disadvantage is counteracted by the operation of the device not as a two-phase but, for example, as a four-phase CCD according to the invention, whereby a d.c. shift is present between the clock voltages for compensating the built-in, comparatively great potential differences described above.
    Type: Grant
    Filed: March 2, 1994
    Date of Patent: February 7, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Jan T. J. Bosiers, Agnes C. M. Kleimann