Patents by Inventor Jan Westra
Jan Westra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11593050Abstract: A printing system is provided including a printer server accessible over a first network at a first location and a cloud service accessible from both the first location and a second network at a second network. A user with a client computer moving between the first network and the second network can print using either the printer server, when the user is on the first network, or the cloud service, when the user is on the second network. The client computer is configured detect its location and receive configuration information from the cloud service. The configuration information changes the method used by the client computer to print depending upon the client computer's detected location.Type: GrantFiled: January 23, 2020Date of Patent: February 28, 2023Assignee: CANON EUROPA N.V.Inventors: Karsten Huster, Chris Tickler, Lex-Jan Westra
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Patent number: 11507119Abstract: In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.Type: GrantFiled: August 2, 2019Date of Patent: November 22, 2022Assignee: Avago Technologies International Sales PTE. LimitedInventors: Kambiz Vakilian, Jan Westra, Dmitrii Loukianov, Vikrant Dhamdhere, Jingguang Wang
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Publication number: 20220091805Abstract: A printing system is provided including a printer server accessible over a first network at a first location and a cloud service accessible from both the first location and a second network at a second network. A user with a client computer moving between the first network and the second network can print using either the printer server, when the user is on the first network, or the cloud service, when the user is on the second network. The client computer is configured detect its location and receive configuration information from the cloud service. The configuration information changes the method used by the client computer to print depending upon the client computer's detected location.Type: ApplicationFiled: January 23, 2020Publication date: March 24, 2022Inventors: Karsten HUSTER, Chris TICKLER, Lex-Jan WESTRA
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Publication number: 20200050224Abstract: In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.Type: ApplicationFiled: August 2, 2019Publication date: February 13, 2020Inventors: Kambiz Vakilian, Jan Westra, Dmitrii Loukianov, Vikrant Dhamdhere, Jingguang Wang
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Patent number: 10014877Abstract: A digital-to-analog converter (DAC) includes a plurality of segments, wherein the plurality of segments includes a first segment electronically coupled to each of the plurality of segments, wherein the first segment includes a predetermined number of most significant bits (MSB), a second segment electronically coupled to each of the plurality of segments, wherein the second segment includes a first predetermined number of least significant bits (LSB), and a third segment electronically coupled with each of the plurality of segments, wherein the third segment includes a second predetermined number of LSBs. Additionally, the DAC includes an all logic implementation.Type: GrantFiled: September 1, 2017Date of Patent: July 3, 2018Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Adesh Garg, Ali Nazemi, Jiawen Zhang, Burak Catli, Anand J. Vasani, Jun Cao, Jan Mulder, Jan Westra
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Patent number: 7616144Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.Type: GrantFiled: September 18, 2007Date of Patent: November 10, 2009Assignee: Broadcom CorporationInventors: Jan Mulder, Franciscus Maria Leonardus van der Goes, Jan Westra, Rudy van der Plassche
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Publication number: 20080088493Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.Type: ApplicationFiled: September 18, 2007Publication date: April 17, 2008Applicant: Broadcom CorporationInventors: Jan MULDER, Franciscus van der GOES, Jan WESTRA, Rudy van der PLASSCHE
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Publication number: 20070257744Abstract: A programmable gain attenuator includes a termination resistor. A first termination switch connects one side of the termination resistor to a first output. A second termination switch connects another side of the termination resistor to a second output. A first resistor ladder is arranged between a first input and the first side of the termination resistor. A first plurality of switches connect a corresponding tap from the first resistor ladder to the first output. A second resistor ladder is arranged between a second input and the second side of the termination resistor. A second plurality of switches connect a corresponding tap from the second resistor ladder to the second output. A first switch of the first plurality of switches is turned on, followed by a second switch of first plurality of switches turned off, followed by a third switch of first plurality of switches turned on.Type: ApplicationFiled: July 9, 2007Publication date: November 8, 2007Applicant: Broadcom CorporationInventors: Jan Westra, Jan Mulder, Franciscus van der Goes
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Patent number: 7271755Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.Type: GrantFiled: August 26, 2004Date of Patent: September 18, 2007Assignee: Broadcom CorporationInventors: Jan Mulder, Franciscus Maria Leonardus van der Goes, Jan Westra, Rudy van der Plassche
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Publication number: 20070188247Abstract: A resonator-synchronized oscillator for resonance mode selection is disclosed. In one embodiment, the resonator-synchronized oscillator comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a multi-mode resonator having an output coupled to the at least one capacitor switching circuit. The output signal of the resonator is used to synchronize the oscillator using switched capacitor structures to instantaneously reset the phase of the resonator-synchronized oscillator.Type: ApplicationFiled: February 10, 2006Publication date: August 16, 2007Applicant: Broadcom CorporationInventor: Jan Westra
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Publication number: 20070188248Abstract: An oscillator circuit providing quadrature outputs and enabling instantaneous control over phase, frequency and amplitude of the output waveforms is disclosed. In one embodiment, the oscillator circuit comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a synchronization signal having an output coupled to the at least one capacitor switching circuit. The synchronization signal may be derived internally from the oscillation loop or externally from an external oscillator.Type: ApplicationFiled: February 10, 2006Publication date: August 16, 2007Applicant: Broadcom CorporationInventor: Jan Westra
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Publication number: 20060183434Abstract: A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.Type: ApplicationFiled: April 10, 2006Publication date: August 17, 2006Applicant: Broadcom CorporationInventors: Jan Westra, Rudy van de Plassche, Chi-Hung Lin
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Publication number: 20050190086Abstract: A unit cell for a digital to analog conversion circuit comprising; a current source (CS); a first data switch (S1) coupled to the circuit source (CS); a second data switch (S2) coupled to the current source (CS); a first phase switch (Phi 1) coupled between the current source (CS) and the first data switch (S1); a second phase switch (Phi2) coupled between the current source (CS) and the second data switch (S2); a controller arranged to switch between the first (Phi1) and second (Phi2) phase switches in a Break Before Make alternating sequence, and to switch the first (S1) and second (S2) data switches in a Make Before Break sequence.Type: ApplicationFiled: March 19, 2003Publication date: September 1, 2005Inventor: Jan Westra
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Publication number: 20050093644Abstract: A programmable gain attenuator includes a termination resistor. A first termination switch connects one side of the termination resistor to a first output. A second termination switch connects another side of the termination resistor to a second output. A first resistor ladder is arranged between a first input and the first side of the termination resistor. A first plurality of switches connect a corresponding tap from the first resistor ladder to the first output. A second resistor ladder is arranged between a second input and the second side of the termination resistor. A second plurality of switches connect a corresponding tap from the second resistor ladder to the second output. A first switch of the first plurality of switches is turned on, followed by a second switch of first plurality of switches turned off, followed by a third switch of first plurality of switches turned on.Type: ApplicationFiled: April 23, 2004Publication date: May 5, 2005Applicant: Broadcom CorporationInventors: Jan Westra, Jan Mulder, Franciscus van der Goes
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Publication number: 20050093643Abstract: A programmable gain attenuator includes a termination resistor. A first termination switch connects one side of the termination resistor to a first output. A second termination switch connects another side of the termination resistor to a second output. A first resistor ladder is arranged between a first input and the first side of the termination resistor. A first plurality of switches connect a corresponding tap from the first resistor ladder to the first output. A second resistor ladder is arranged between a second input and the second side of the termination resistor. A second plurality of switches connect a corresponding tap from the second resistor ladder to the second output. A first switch of the first plurality of switches is turned on, followed by a second switch of first plurality of switches turned off, followed by a third switch of first plurality of switches turned on.Type: ApplicationFiled: October 29, 2003Publication date: May 5, 2005Inventors: Jan Westra, Jan Mulder
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Publication number: 20050068216Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.Type: ApplicationFiled: August 26, 2004Publication date: March 31, 2005Applicant: Broadcom CorporationInventors: Jan Mulder, Franciscus Maria Leonardus Goes, Jan Westra, Rudy Plassche