Abstract: A power semiconductor device includes: a semiconductor body coupled to first and second load terminals; an active region with first and second sections, both configured to conduct a load current between the load terminals; electrically isolated from the load terminals, first control electrodes in the first section and second control electrodes in both the first and second sections); and semiconductor channel structures in the semiconductor body extending in both the first and second sections. Each channel structure is associated to at least one of the first and second control electrodes. The respective control electrode is configured to induce an inversion channel for load current conduction in the associated semiconductor channel structure. The first section exhibits a first effective total inversion channel width per unit area ratio, W/A1, and the second section exhibits a second effective inversion channel width per unit area ratio, W/A2, where W/A1>W/A2.

Abstract: A semiconductor switching module includes an insulated gate bipolar transistor and a unipolar switching device. The insulated gate bipolar transistor includes a first transistor cell and a supplemental cell, wherein the first transistor cell includes a first gate and a first source and wherein the supplemental cell includes a second gate and a supplemental electrode. The unipolar switching device is based on a wide bandgap material and includes a third gate and a third source. The third gate and the second gate are electrically connected with each other and are disconnected from the first gate. The first source, the supplemental cell and the third source are electrically connected with each other.

Abstract: The present invention provides a fabrication method for a semiconductor structure having a partly filled trench, having the following steps: provision of a semiconductor structure (1, 5) having a trench (2); filling of the trench (2) with a filling (10) in such a way that the filling (10) projects above a surface (OF) of the semiconductor structure (1, 5) by a first height (h1), the filling (10) covering the trench (2) and the periphery (20) of the trench (2); planarization of the filling (10) in a first etching step in such a way that the filling (10) is essentially planar with the surface (OF) of the semiconductor structure (1, 5); and sinking of the filling (10) in the trench (2) in a second etching step by a predetermined depth (T) proceeding from the surface of the semiconductor structure (1, 5); essentially the same plasma power and the same etchant composition being used for the first and second etching steps.

Abstract: The present invention provides a fabrication method for a semiconductor structure having a partly filled trench, having the following steps: provision of a semiconductor structure (1, 5) having a trench (2); filling of the trench (2) with a filling (10) in such a way that the filling (10) projects above a surface (OF) of the semiconductor structure (1, 5) by a first height (h1), the filling (10) covering the trench (2) and the periphery (20) of the trench (2); planarization of the filling (10) in a first etching step in such a way that the filling (10) is essentially planar with the surface (OF) of the semiconductor structure (1, 5); and sinking of the filling (10) in the trench (2) in a second etching step by a predetermined depth (T) proceeding from the surface of the semiconductor structure (1, 5); essentially the same plasma power and the same etchant composition being used for the first and second etching steps.