Patents by Inventor Janakiram Ganesh Sankaranarayanan

Janakiram Ganesh Sankaranarayanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On-chip linearity calibration
    Patent number: 9379753
    Abstract: An apparatus including: at least one receiver having injection points and having at least an amplifier and a transformer; and a plurality of isolation switches coupled to injection points of the at least one receiver, the plurality of isolation switches configured to route a calibration signal generated by a transmitter to one of the injection points.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Janakiram Ganesh Sankaranarayanan, Ojas Mahendra Choksi, Hasnain Mohammedi Lakdawala, Wei Zhuo, Faramarz Sabouri
  • ON-CHIP LINEARITY CALIBRATION
    Publication number: 20160080018
    Abstract: An apparatus including: at least one receiver having injection points and having at least an amplifier and a transformer; and a plurality of isolation switches coupled to injection points of the at least one receiver, the plurality of isolation switches configured to route a calibration signal generated by a transmitter to one of the injection points.
    Type: Application
    Filed: October 6, 2014
    Publication date: March 17, 2016
    Inventors: Janakiram Ganesh Sankaranarayanan, Ojas Mahendra Choksi, Hasnain Mohammedi Lakdawala, Wei Zhuo, Faramarz Sabouri
  • Distortion cancellation for low noise amplifier (LNA) non-linear second order products
    Patent number: 9178473
    Abstract: A device includes a main low noise amplifier (LNA) stage configured to amplify a single-ended communication signal, an auxiliary LNA stage coupled to the main LNA stage, the auxiliary LNA stage configured to cancel non-linear second order products generated by the main LNA stage, and a load circuit configured to receive an output of the main LNA stage and an output of the auxiliary LNA stage, the load circuit configured to convert the single-ended communication signal to a differential signal.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: November 3, 2015
    Assignee: Qualcomm Incorporated
    Inventor: Janakiram Ganesh Sankaranarayanan
  • DISTORTION CANCELLATION FOR LOW NOISE AMPLIFIER (LNA) NON-LINEAR SECOND ORDER PRODUCTS
    Publication number: 20150180423
    Abstract: A device includes a main low noise amplifier (LNA) stage configured to amplify a single-ended communication signal, an auxiliary LNA stage coupled to the main LNA stage, the auxiliary LNA stage configured to cancel non-linear second order products generated by the main LNA stage, and a load circuit configured to receive an output of the main LNA stage and an output of the auxiliary LNA stage, the load circuit configured to convert the single-ended communication signal to a differential signal.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventor: Janakiram Ganesh Sankaranarayanan
  • RF isolation switch circuit
    Patent number: 8514008
    Abstract: In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: August 20, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Hongyan Yan, Janakiram Ganesh Sankaranarayanan, Bhushan Shanti Asuri, Himanshu Khatri, Vinod V. Panikkath
  • RF ISOLATION SWITCH CIRCUIT
    Publication number: 20120025927
    Abstract: In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.
    Type: Application
    Filed: September 16, 2010
    Publication date: February 2, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Hongyan Yan, Janakiram Ganesh Sankaranarayanan, Bhushan Shanti Asuri, Himanshu Khatri, Vinod V. Panikkath