Patents by Inventor Janardan Upadhyay

Janardan Upadhyay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Radio frequency plasma method for uniform surface processing of RF cavities and other three-dimensional structures
    Patent number: 9852891
    Abstract: A method for efficient plasma etching of surfaces inside three-dimensional structures can include positioning an inner electrode within the chamber cavity; evacuating the chamber cavity; adding a first inert gas to the chamber cavity; regulating the pressure in the chamber; generating a plasma sheath along the inner wall of the chamber cavity; adjusting a positive D.C. bias on the inner electrode to establish an effective plasma sheath voltage; adding a first electronegative gas to the chamber cavity; optionally readjusting the positive D.C. bias on the inner electrode reestablish the effective plasma sheath voltage at the chamber cavity; etching the inner wall of the chamber cavity; and polishing the inner wall to a desired surface roughness.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: December 26, 2017
    Assignee: Old Dominion University Research Foundation
    Inventors: Svetozar Popovic, Janardan Upadhyay, Leposava Vuskovic, H. Lawrence Phillips, Anne-Marie Valente-Feliciano
  • RADIO FREQUENCY PLASMA METHOD FOR UNIFORM SURFACE PROCESSING OF RF CAVITIES AND OTHER THREE-DIMENSIONAL STRUCTURES
    Publication number: 20170040144
    Abstract: A method for efficient plasma etching of surfaces inside three-dimensional structures can include positioning an inner electrode within the chamber cavity; evacuating the chamber cavity; adding a first inert gas to the chamber cavity; regulating the pressure in the chamber; generating a plasma sheath along the inner wall of the chamber cavity; adjusting a positive D.C. bias on the inner electrode to establish an effective plasma sheath voltage; adding a first electronegative gas to the chamber cavity; optionally readjusting the positive D.C. bias on the inner electrode reestablish the effective plasma sheath voltage at the chamber cavity; etching the inner wall of the chamber cavity; and polishing the inner wall to a desired surface roughness.
    Type: Application
    Filed: April 16, 2015
    Publication date: February 9, 2017
    Applicant: Old Dominion University
    Inventors: Svetozar Popovic, JANARDAN UPADHYAY, LEPOSAVA VUSKOVIC, H. Lawrence Phillips, ANNE-MARIE VALENTE-FELICIANO
  • Anti-malware scanning in parallel processors of a graphics processing unit
    Patent number: 8392989
    Abstract: A method of anti-malware scanning includes providing, in a computing system including a central processor, a multimedia processor including a number of processors to operate in parallel with one another. The anti-malware scanning further includes executing an anti-malware algorithm using the multimedia processor to free the central processor for a non-anti-malware related task.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: March 5, 2013
    Assignee: Nvidia Corporation
    Inventor: Janardan Upadhyay
  • ANTI-MALWARE SCANNING IN PARALLEL PROCESSORS OF A GRAPHICS PROCESSING UNIT
    Publication number: 20110083184
    Abstract: A method of anti-malware scanning includes providing, in a computing system including a central processor, a multimedia processor including a number of processors to operate in parallel with one another. The anti-malware scanning further includes executing an anti-malware algorithm using the multimedia processor to free the central processor for a non-anti-malware related task.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 7, 2011
    Inventor: JANARDAN UPADHYAY