Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide methods to reduce the resistance of the work function layer of an electronic device, as well as using a low resistivity metal for filling the gate.

Abstract: Embodiments of the disclosure relate to methods of depositing seam-free gapfill. In some embodiments, the gapfill consists of titanium nitride. The gapfill methods comprise forming a first layer and a second layer. The firs layer is formed without treatment or densification, while the second layer is formed with periodic treatment. The resulting gapfill in advantageously seam-free.

Abstract: Gas distribution assemblies for semiconductor manufacturing processing chambers that improve flow uniformity are described. The gas distribution assemblies comprise a backing plate, a showerhead and a diffuser plate between the backing plate and the showerhead. The diffuser plate has a center opening and at least one zone opening aligned with inlets in the backing plate and recesses in the showerhead.

Abstract: One or more embodiments of the disclosure are directed to methods of forming structures that are useful for FEOL and BEOL processes. Embodiments of the present disclosure advantageously provide methods of depositing a gapfill material, such as titanium nitride (TiN), in high aspect ratio (AR) structures with small dimensions. Some embodiments advantageously provide seam-free high-quality TiN films to fill high AR trenches with small dimensions. Embodiments of the present disclosure advantageously provide methods of filling 3D structures, such as FinFETs, GAAs, and the like, with a gapfill material without creating a seam. One or more embodiments include selective deposition processes using a carbon (C) layer in order to provide seam-free TiN gapfill in 3D structures, such as GAA devices.

Abstract: Methods of manufacturing electronic devices, such as transistors (negative metal-oxide-semiconductor (NMOS) transistors (e.g., an N-metal stack) and positive metal-oxide-semiconductor (PMOS) transistors (e.g., a P-metal stack)) are described. Embodiments of the disclosure are directed to methods of improving PMOS transistor performance by inhibiting N-metal layer growth. The present disclosure provides two types of processes to reduce or inhibit N-metal layer growth. The disclosure provides methods which include forming a self-assembled monolayer (SAM) on the metal surface (e.g., titanium nitride (TiN)) of the PMOS, and methods which include forming a silicon-containing layer such as silicon oxide (SiOx) on the TiN surface. These two types of processes significantly reduce or inhibit the subsequent growth of an N-metal layer, such as titanium aluminum carbide (TiAlC), on the TiN surface of the PMOS.

Abstract: One or more embodiments of the disclosure are directed to methods of forming structures that are useful for FEOL and BEOL processes. Embodiments of the present disclosure advantageously provide methods of depositing titanium nitride (TiN) in high aspect ratio (AR) structures with small dimensions. Some embodiments advantageously provide seam-free high-quality TiN films to fill high AR trenches with small dimensions. Embodiments of the present disclosure advantageously provide methods of filling 3D structures, such as finFETs, GAAs, and the like, without creating a seam. The methods include selective deposition processes using blocking compounds in order to provide seam-free TiN gapfill in 3D structures, such as GAA devices.

Abstract: Embodiments of the disclosure relate to methods of depositing seam-free gapfill. In some embodiments, the gapfill consists of titanium nitride. The gapfill methods comprise forming a first layer and a second layer. The firs layer is formed without treatment or densification, while the second layer is formed with periodic treatment. The resulting gapfill in advantageously seam-free.

Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide methods to reduce the resistance of the work function layer of an electronic device, as well as using a low resistivity metal for filling the gate.

Abstract: Substrate support, substrate support assemblies and process chambers comprising same are described. The substrate support has a thermally conductive body with a top surface, a bottom surface and an outer edge, and a plurality of long edge purge channel outlet opening at the outer edge of the thermally conductive body. The substrate support is configured to support a substrate to be processed on a top surface of the substrate support. The top surface of the thermally conductive body may have a ceramic coating. Each of the plurality of purge channel outlet is in fluid communication with a long edge purge channel. The long edge purge channel is coated with a long edge purge channel coating. A substrate support assembly includes the substrate support and the support post coupled to the substrate support. The processing chamber include a chamber body and the substrate support within the chamber body.

Abstract: Methods of forming metal-containing films for electronic devices (e.g., logic devices and/or memory devices) and methods for reducing equivalent oxide thickness (EOT) penalty in electronic devices are disclosed. The methods comprise exposing a substrate surface to a metal precursor, such as titanium chloride (TiCl4), a reducing agent, such as a cyclic 1,4-diene, and a reactant, ammonia (NH3), either simultaneously, partially simultaneously or separately and sequentially to form the metal-containing film.

Abstract: Embodiments described herein generally relate to an in-situ metrology system that can constantly provide an uninterrupted optical access to a substrate disposed within a process chamber. In one embodiment, a metrology system for a substrate processing chamber is provided. The metrology system includes a sensor view pipe coupling to a quartz dome of a substrate processing chamber, a flange extending radially from an outer surface of the sensor view pipe, and a viewport window disposed on the flange, the viewport window having spectral ranges chosen for an optical sensor that is disposed on or adjacent to the viewport window.

Abstract: Embodiments described herein generally relate to an in-situ metrology system that can constantly provide an uninterrupted optical access to a substrate disposed within a process chamber. In one embodiment, a metrology system for a substrate processing chamber is provided. The metrology system includes a sensor view pipe coupling to a quartz dome of a substrate processing chamber, a flange extending radially from an outer surface of the sensor view pipe, and a viewport window disposed on the flange, the viewport window having spectral ranges chosen for an optical sensor that is disposed on or adjacent to the viewport window.