Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Abstract: A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.

Abstract: A system, method and computer program product for sampling computer system performance data are provided. The system includes a sample buffer to store instrumentation data while capturing trace data in a trace array, where the instrumentation data enables measurement of computer system performance. The system further includes a sample interrupt generator to assert a sample interrupt indicating that the instrumentation data is available to read. The sample interrupt is asserted in response to storing the instrumentation data in the sample buffer.

Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Abstract: An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.

Abstract: There is provided a method, system and computer program product for generating trace data related to a data processing system event. The method includes: receiving an instruction relating to the system event from a location in the system; determining a minimum number of trace segment records required to record instruction information; and creating a trace segment table including the number of trace segment records, the number of trace segment records including at least one instruction record.

Abstract: The present invention relates to a method, computer program product and system for generating a sample signal from differing clock domain boundaries. The system comprises a cycle base component, a sample offset component being configured to receive a time-based sample pulse signal, and logic to generate a sample pulse. The sample pulse generation logic is configured to receive a time-based sample pulse signal, a free running counter value, a sample offset counter value, and deliver a sample pulse signal.

Abstract: A system, method and computer program product for sampling computer system performance data are provided. The system includes a sample buffer to store instrumentation data while capturing trace data in a trace array, where the instrumentation data enables measurement of computer system performance. The system further includes a sample interrupt generator to assert a sample interrupt indicating that the instrumentation data is available to read. The sample interrupt is asserted in response to storing the instrumentation data in the sample buffer.

Abstract: A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.

Abstract: Method, system and computer program product for template-based vertical microcode instruction trace generation. An exemplary embodiment includes an instruction trace generation method, including generating a testcase for a millicoded instruction in an instruction trace pool, wherein the millicoded instruction is included in a parent instruction trace, processing the testcase to generate a millicode instruction trace snippet, editing the millicode instruction trace snippet to generate a templatized millimode snippet, processing the parent instruction trace, accessing the templatized millimode snippet, updating the templatized millimode snippet with a value from the parent instruction trace, and generating a millicoded instruction trace from the updated templatized millimode snippet.

Abstract: Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones.

Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that fetching of storage keys is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of addresses, which indicates whether the fetching can continue. If fetching can continue, the restriction is ignored.

Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that fetching of storage keys is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of addresses, which indicates whether the fetching can continue. If fetching can continue, the restriction is ignored.