Abstract: An example ceramic panel has a first surface and a second surface. The ceramic panel has a bond finger well on the first surface of the ceramic panel a scribe line well on the second surface of the ceramic panel. The ceramic panel also has a scribe line along the scribe line well.

Abstract: An example ceramic panel has a first surface and a second surface. The ceramic panel has a bond finger well on the first surface of the ceramic panel a scribe line well on the second surface of the ceramic panel. The ceramic panel also has a scribe line along the scribe line well.

Abstract: In described examples, a device mounted on a substrate includes an encapsulant. In at least one example, an encapsulant barrier is deposited along a scribe line, along which the substrate is singulatable. To encapsulate one or more terminals of the substrate, an encapsulant is deposited between the encapsulant barrier and an edge of the device parallel to the encapsulant barrier.

Abstract: An example ceramic panel has a first surface and a second surface. The ceramic panel has a bond finger well on the first surface of the ceramic panel a scribe line well on the second surface of the ceramic panel. The ceramic panel also has a scribe line along the scribe line well.

Abstract: A method for processing an integrated optical circuit chip includes securing a panel dam around a periphery of an array of integrated optical circuit chips that share a substrate. The method also includes filling an area circumscribed by the panel dam with an insulating polymer to a level below a top surface of the integrated optical circuit chips. The method further includes singulating a given integrated optical circuit chip in the array of integrated optical circuit chips.

Abstract: In described examples, a device mounted on a substrate includes an encapsulant. In at least one example, an encapsulant barrier is deposited along a scribe line, along which the substrate is singulatable. To encapsulate one or more terminals of the substrate, an encapsulant is deposited between the encapsulant barrier and an edge of the device parallel to the encapsulant barrier.

Abstract: In described examples, a device mounted on a substrate includes an encapsulant. In at least one example, an encapsulant barrier is deposited along a scribe line, along which the substrate is singulatable. To encapsulate one or more terminals of the substrate, an encapsulant is deposited between the encapsulant barrier and an edge of the device parallel to the encapsulant barrier.

Abstract: A method for processing an integrated optical circuit chip includes securing a panel dam around a periphery of an array of integrated optical circuit chips that share a substrate. The method also includes filling an area circumscribed by the panel dam with an insulating polymer to a level below a top surface of the integrated optical circuit chips. The method further includes singulating a given integrated optical circuit chip in the array of integrated optical circuit chips.

Abstract: In described examples, a device mounted on a substrate includes an encapsulant. In at least one example, an encapsulant barrier is deposited along a scribe line, along which the substrate is singulatable. To encapsulate one or more terminals of the substrate, an encapsulant is deposited between the encapsulant barrier and an edge of the device parallel to the encapsulant barrier.

Abstract: Microelectromechanical systems (MEMS) such as digital micromirror devices (DMD) are manufactured in arrays. Covers, packages, and lids are placed around each device and a liquid such as epoxy resin is dispensed around the packaged device. The epoxy resin acts as a sealant to form a hermetic seal. A nozzle comprises multiple orifices along a sidewall of the nozzle to dispense the epoxy resin horizontally and parallel to the plane of the wafer substrate. The distal ends of the nozzle are enclosed.

Abstract: Microelectromechanical systems (MEMS) such as digital micromirror devices (DMD) are manufactured in arrays. Covers, packages, and lids are placed around each device and a liquid such as epoxy resin is dispensed around the packaged device. The epoxy resin acts as a sealant to form a hermetic seal. A nozzle comprises multiple orifices along a sidewall of the nozzle to dispense the epoxy resin horizontally and parallel to the plane of the wafer substrate. The distal ends of the nozzle are enclosed.

Abstract: A packaged electronic device includes a substrate with an upper surface interrupted by a well formed in the substrate. The well has a substrate bottom surface and a substrate sidewall. An electronic device is located in the well over the substrate bottom surface and has a device top surface and a device sidewall. A trench is bounded by the substrate bottom surface, the substrate sidewall and the device sidewall. An encapsulant at least partially fills the trench and contacts the substrate sidewall and the device sidewall. The encapsulant has a first elevation on the substrate sidewall with respect to the substrate bottom surface and a second elevation on the substrate device sidewall with respect to the substrate bottom surface that is at least about 35% greater than the first elevation.

Abstract: A packaged electronic device includes a substrate with an upper surface interrupted by a well formed in the substrate. The well has a substrate bottom surface and a substrate sidewall. An electronic device is located in the well over the substrate bottom surface and has a device top surface and a device sidewall. A trench is bounded by the substrate bottom surface, the substrate sidewall and the device sidewall. An encapsulant at least partially fills the trench and contacts the substrate sidewall and the device sidewall. The encapsulant has a first elevation on the substrate sidewall with respect to the substrate bottom surface and a second elevation on the substrate device sidewall with respect to the substrate bottom surface that is at least about 35% greater than the first elevation.

Abstract: A bipolar device (10) includes an oxide layer (24) which is grown on the surface (16) of a semiconductor substrate (12) by immersing the surface in ozonated deionized water. By selecting an appropriate temperature of the water and concentration of the ozone, the thickness of the film can be maintained within fine tolerances from lot to lot, and over the surface of a wafer (W) comprising the substrate.

Abstract: In the fabrication of an integrated circuit, undesirable bird's beak pull back due to damage caused during ion implantation is alleviated by means of rapid thermal annealing step prior to chemical etching.