Abstract: Methods for fabricating an integrated circuit (IC) device, an IC die configured for probe testing, and an IC device are described therein. In one example, the method includes: forming a conductive cap above and in electrical contact with two or more of a pillars, each pillar coupled to a power contact pads of an IC die, removing the cap after testing; and depositing a hybrid bonding layer over the IC die device, the hybrid bonding layer having hybrid bond pads coupled the plurality of power contact pads and the signal contact pads of the IC die.

Abstract: An integrated circuit (IC) chip device includes testing interface circuitry and testing circuitry to test the operation of the IC chips of the IC chip device. The IC chip device includes a first IC chip that comprises first testing circuitry. The first testing circuitry receives a mode select signal, a clock signal, and encoded signals, and comprises finite state machine (FSM) circuitry, decoder circuitry, and control circuitry. The FSM circuitry determines an instruction based on the mode select signal and the clock signal. The decoder circuitry decodes the encoded signals to generate a decoded signal. The control circuitry generates a control signal from the instruction and the decoded signal. The control signal indicates a test to be performed by the first testing circuitry.