Abstract: A method includes receiving, by a network processing computer, software information from a development computer. The network processing computer can determine one or more logical modules of a plurality of logical modules based on the software information. The network processing computer can provide the one or more logical modules to a testing computer. The testing computer evaluates one or more software modules corresponding to the software information using the one or more logical modules. The network processing computer receives a security evaluation report from the testing computer based on the evaluation of the one or more software modules using the one or more logical modules. The network processing computer creates a security evaluation summary based on the security evaluation report.

Abstract: The invention provides compositions including anti-tryptase antibodies and pharmaceutical compositions thereof, as well as methods of using the same.

Abstract: In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first side wall spacers is different from a second depth of the first space above the first gate electrode layer.

Abstract: A semiconductor device includes a first field effect transistor (FET) including a first gate dielectric layer and a first gate electrode. The first gate electrode includes a first lower metal layer and a first upper metal layer. The first lower metal layer includes a first underlying metal layer in contact with the first gate dielectric layer and a first bulk metal layer. A bottom of the first upper metal layer is in contact with an upper surface of the first underlying metal layer and an upper surface of the first bulk metal layer.

Abstract: One example includes an optical transmitter system. The system includes a waveguide to receive and propagate an optical signal. The system also includes a ring modulation system comprising a ring resonator that is optically coupled to the waveguide and is to resonate a given wavelength of the optical signal in response to an input data signal that is provided to a modulation amplifier to provide carrier injection to change a refractive index of the ring resonator to resonate the given wavelength of the optical signal to modulate the optical signal. The system further includes a tuning controller associated with the ring modulation system. The tuning controller can implement iterative feedback tuning of the ring modulation system based on a relative amplitude of an optical intensity of the given wavelength in the ring resonator and a variable reference amplitude to substantially stabilize the ring resonator with respect to the given wavelength.

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a substrate. A source/drain region is formed. A first insulating layer is formed over the dummy gate structure and the source/drain region. A gate space is formed by removing the dummy gate structure. The gate space is filled with a first metal layer. A gate recess is formed by removing an upper portion of the filled first metal layer. A second metal layer is formed over the first metal layer in the gate recess. A second insulating layer is formed over the second metal layer in the gate recess.

Abstract: A semiconductor device includes a first gate structure disposed on a substrate. The first gate structure includes a first gate electrode, a first cap insulating layer disposed over the first gate electrode and first sidewall spacers disposed on both side faces of the first gate electrode and the first cap insulating layer. The semiconductor device further includes a first protective layer formed over the first cap insulating layer and at least one of the first sidewall spacers. The first protective layer includes at least one selected from the group consisting of AlON, AlN and amorphous silicon.

Abstract: One example includes an optical transmitter system. The system includes a waveguide to receive and propagate an optical signal. The system also includes a ring modulation system comprising a ring resonator that is optically coupled to the waveguide and is to resonate a given wavelength of the optical signal in response to an input data signal that is provided to a modulation amplifier to provide carrier injection to change a refractive index of the ring resonator to resonate the given wavelength of the optical signal to modulate the optical signal. The system further includes a tuning controller associated with the ring modulation system. The tuning controller can implement iterative feedback tuning of the ring modulation system based on a relative amplitude of an optical intensity of the given wavelength in the ring resonator and a variable reference amplitude to substantially stabilize the ring resonator with respect to the given wavelength.

Abstract: In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first side wall spacers is different from a second depth of the first space above the first gate electrode layer.

Abstract: In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first side wall spacers is different from a second depth of the first space above the first gate electrode layer.

Abstract: In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first side wall spacers is different from a second depth of the first space above the first gate electrode layer.

Abstract: A semiconductor device includes a first gate structure disposed on a substrate. The first gate structure includes a first gate electrode, a first cap insulating layer disposed over the first gate electrode and first sidewall spacers disposed on both side faces of the first gate electrode and the first cap insulating layer. The semiconductor device further includes a first protective layer formed over the first cap insulating layer and at least one of the first sidewall spacers. The first protective layer includes at least one selected from the group consisting of AlON, AlN and amorphous silicon.

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a substrate. A source/drain region is formed. A first insulating layer is formed over the dummy gate structure and the source/drain region. A gate space is formed by removing the dummy gate structure. The gate space is filled with a first metal layer. A gate recess is formed by removing an upper portion of the filled first metal layer. A second metal layer is formed over the first metal layer in the gate recess. A second insulating layer is formed over the second metal layer in the gate recess.

Abstract: A method and apparatus for playing the same video game by a number of players at remote locations over a telephone network. More specifically, a video representation of the game played by a number of video game players stored at each of the player locations. The control signals representing the actions of the players are then transmitted to a single one of the locations where the control signals are sequenced. The sequence control signals are then stored in a queue wherein the video game is played at each of the locations by synchronously reading the control signals from each queue at each of the locations and sending them to corresponding ports of each video game at each location.