Abstract: A system and address method for extracting a PE number and offset from an array index. According to one aspect of the present invention, a processing element number is assigned to each processing element, a local memory address is assigned to each memory location and a linearized index is assigned to each array element in an array. The processing element number of the processing element in which a particular array element is stored is computed as a function of a linearized index associated with the array element and a distribution specification associated with the array. In addition, a local memory address associated with the array element is computed as a function of the linearized index and the distribution specification.

Abstract: A method of setting array boundaries in order to simplify addressing across processor elements in a distributed memory system having global addressing. Each dimension of an array is examined to determine a lower bound, a declared upper bound and an implicit upper bound. The lower bound and the declared upper bound in each dimension are used to set limits for operations on array elements while the implicit upper bound calculated from the lower bound and the declared upper bound is used in calculating the location (processor element and offset) of a particular array element.