Patents by Inventor Janet M. Snyder

Janet M. Snyder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable logic device address buffer/multiplexer/driver
    Patent number: 5185539
    Abstract: A programmable logic device having four AND gate means defined therein is used to combine first and second inputs as well as multiplexing and latch signals. These signals are ANDed together (first input and multiplexing signals; inverted multiplexing signal and latch signal and second input; inverted multiplexing signal, second input signal and device output signal; and inverted latch signal and device output signal) to provide four output signals which are ORed together to produce the device output signal.
    Type: Grant
    Filed: August 31, 1990
    Date of Patent: February 9, 1993
    Assignee: Motorola, Inc.
    Inventors: Janet M. Snyder, Eugene H. Gruender, Jr.