Patents by Inventor Jang-Cheng Hsieh

Jang-Cheng Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9484385
    Abstract: An image sensor package and method for fabricating the same is provided. The image sensor package includes a first substrate comprising a via hole therein, a driving circuit and a first conductive pad thereon. A second substrate comprising a photosensitive device and a second conductive pad thereon is bonded to the first substrate, so that the driving circuit, formed on the first substrate, can electrically connect to and further control the photosensitive device, formed on the second substrate. A solder ball is formed on a backside of the first substrate and electrically connects to the via hole for transmitting a signal from the driving circuit. Because the photosensitive device and the driving circuit are fabricated individually on the different substrates, fabrication and design thereof is more flexible. Moreover, the image sensor package is relatively less thick, thus, the dimensions thereof are reduced.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: November 1, 2016
    Assignee: VisEra Technologies Company Limited
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Publication number: 20160079304
    Abstract: An image sensor package and method for fabricating the same is provided. The image sensor package includes a first substrate comprising a via hole therein, a driving circuit and a first conductive pad thereon. A second substrate comprising a photosensitive device and a second conductive pad thereon is bonded to the first substrate, so that the driving circuit, formed on the first substrate, can electrically connect to and further control the photosensitive device, formed on the second substrate. A solder ball is formed on a backside of the first substrate and electrically connects to the via hole for transmitting a signal from the driving circuit. Because the photosensitive device and the driving circuit are fabricated individually on the different substrates, fabrication and design thereof is more flexible. Moreover, the image sensor package is relatively less thick, thus, the dimensions thereof are reduced.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: Jui-Ping WENG, Jang-Cheng HSIEH, Tzu-Han LIN, Pai-Chun Peter ZUNG
  • Patent number: 9231012
    Abstract: An image sensor package and method for fabricating the same is provided. The image sensor package includes a first substrate comprising a via therein, a driving circuit and a first conductive pad thereon. A second substrate comprising a photosensitive device and a second conductive pad thereon is bonded to the first substrate, so that the driving circuit, formed on the first substrate, can electrically connect to and further control the photosensitive device, formed on the second substrate. A solder ball is formed on a backside of the first substrate and electrically connects to the via for transmitting a signal from the driving circuit. Because the photosensitive device and the driving circuit are fabricated individually on the different substrates, fabrication and design thereof is more flexible. Moreover, the image sensor package is relatively less thick, thus, the dimensions thereof are reduced.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: January 5, 2016
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Patent number: 7898070
    Abstract: The invention provides an image sensor package and method for fabricating the same. The image sensor package comprises a first substrate comprising a sensor device thereon and a hole therein. A bonding pad comprising a first opening is formed on an upper surface of the first substrate. A second substrate comprising a spacer element with a second opening therein is disposed on the first substrate. A conductive plug is formed in the hole and passes through the first and second openings to the second substrate to electrically contact with the bonding pad. A conductive layer is formed on a lower surface of the first substrate and electrically connects to the conductive plug. A solder ball is formed on the conductive layer and electrically connects to the bonding pad by the conductive plug. The image sensor package further comprises a second substrate bonding to the first substrate. The image sensor package is relatively less thick, thus, the dimensions thereof are relatively reduced.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: March 1, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Publication number: 20090309178
    Abstract: The invention provides an image sensor package and method for fabricating the same. The image sensor package comprises a first substrate comprising a sensor device thereon and a hole therein. A bonding pad comprising a first opening is formed on an upper surface of the first substrate. A second substrate comprising a spacer element with a second opening therein is disposed on the first substrate. A conductive plug is formed in the hole and passes through the first and second openings to the second substrate to electrically contact with the bonding pad. A conductive layer is formed on a lower surface of the first substrate and electrically connects to the conductive plug. A solder ball is formed on the conductive layer and electrically connects to the bonding pad by the conductive plug. The image sensor package further comprises a second substrate bonding to the first substrate. The image sensor package is relatively less thick, thus, the dimensions thereof are relatively reduced.
    Type: Application
    Filed: August 19, 2009
    Publication date: December 17, 2009
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Patent number: 7595220
    Abstract: The invention provides an image sensor package and method for fabricating the same. The image sensor package comprises a first substrate comprising a sensor device thereon and a hole therein. A bonding pad comprising a first opening is formed on an upper surface of the first substrate. A second substrate comprising a spacer element with a second opening therein is disposed on the first substrate. A conductive plug is formed in the hole and passes through the first and second openings to the second substrate to electrically contact with the bonding pad. A conductive layer is formed on a lower surface of the first substrate and electrically connects to the conductive plug. A solder ball is formed on the conductive layer and electrically connects to the bonding pad by the conductive plug. The image sensor package further comprises a second substrate bonding to the first substrate. The image sensor package is relatively less thick, thus, the dimensions thereof are relatively reduced.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: September 29, 2009
    Assignee: VisEra Technologies Company Limited
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Publication number: 20090032893
    Abstract: An image sensor package and method for fabricating the same is provided. The image sensor package includes a first substrate comprising a via hole therein, a driving circuit and a first conductive pad thereon. A second substrate comprising a photosensitive device and a second conductive pad thereon is bonded to the first substrate, so that the driving circuit, formed on the first substrate, can electrically connect to and further control the photosensitive device, formed on the second substrate. A solder ball is formed on a backside of the first substrate and electrically connects to the via hole for transmitting a signal from the driving circuit. Because the photosensitive device and the driving circuit are fabricated individually on the different substrates, fabrication and design thereof is more flexible. Moreover, the image sensor package is relatively less thick, thus, the dimensions thereof are reduced.
    Type: Application
    Filed: August 1, 2007
    Publication date: February 5, 2009
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chung Peter Zung
  • Publication number: 20090001495
    Abstract: The invention provides an image sensor package and method for fabricating the same. The image sensor package comprises a first substrate comprising a sensor device thereon and a hole therein. A bonding pad comprising a first opening is formed on an upper surface of the first substrate. A second substrate comprising a spacer element with a second opening therein is disposed on the first substrate. A conductive plug is formed in the hole and passes through the first and second openings to the second substrate to electrically contact with the bonding pad. A conductive layer is formed on a lower surface of the first substrate and electrically connects to the conductive plug. A solder ball is formed on the conductive layer and electrically connects to the bonding pad by the conductive plug. The image sensor package further comprises a second substrate bonding to the first substrate. The image sensor package is relatively less thick, thus, the dimensions thereof are relatively reduced.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Inventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
  • Patent number: 6444541
    Abstract: A method for forming lining oxide in an opening for a shallow trench isolation and a method for forming a shallow trench isolation incorporating a lining oxide layer are described. In the method for forming lining oxide, a silicon substrate is first provided, followed by a process of forming a pad oxide layer and a silicon nitride mask sequentially on top of the silicon substrate. A trench opening is then patterned and formed in the silicon substrate for the shallow trench isolation. The silicon substrate is then annealed at a temperature of at least 1,000° C. in a furnace in an environment that contains not more than 10 vol. % oxygen. A lining oxide layer is formed in the same furnace used for annealing the structure of the trench opening in the silicon substrate.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: September 3, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Jun-Yang Lai, Jih-Hwa Wang, Chou-Jie Tsai, Chin-Te Huang, Su-Yu Yeh, Meng-Shiun Shieh, Jang-Cheng Hsieh, Chung-Te Lin
  • Patent number: 6248673
    Abstract: Within a method for fabricating a microelectronic fabrication there is first provided a substrate. There is then formed over the substrate a microelectronic device. There is then formed over the microelectronic device a passivating dielectric layer formed from a passivating dielectric material selected from the group consisting of fluorosilicate glass (FSG) passivating dielectric materials, atmospheric pressure chemical vapor deposited (APCVD) passivating dielectric materials, subatmospheric pressure chemical vapor deposited (SACVD) passivating dielectric materials and spin-on-glass (SOG) passivating dielectric materials to form from the microelectronic device a passivated microelectronic device. Finally, there is then annealed thermally, while employing a thermal annealing method employing an atmosphere comprising hydrogen, the passivated microelectronic device to form a stabilized passivated microelectronic device.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: June 19, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ji-Chung Huang, Jang-Cheng Hsieh, Chung-Cheng Wu, Kuo-Ching Huang
  • Patent number: 5646057
    Abstract: A method is provided for improving the performance characteristics of the MOS devices contained within an integrated circuit that has been subjected to a rapid thermal anneal. After the rapid thermal anneal the integrated circuit is heated for more than about 30 minutes at a temperature of more than about 430.degree. C. in a gaseous atmosphere that contains hydrogen, typically forming gas.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: July 8, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chwen-Ming Liu, Jenn-Ming Huang, Hsien-Wei Chin, Huan-Chung You, Jang-Cheng Hsieh