Patents by Inventor Jang Hoo Kim

Jang Hoo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240386921
    Abstract: A memory module includes a plurality of memory devices. Each of the plurality of memory devices includes a plurality of data input/output pads, a plurality of on-die termination (ODT) circuits each including one or more resistors, a plurality of transceiver circuits each including one or more transmission drivers and one or more reception buffers, and a plurality of equalizer circuits each including one or more inductors. Each of the plurality of equalizer circuits is connected to one of the plurality of data input/output pads, one of the plurality of ODT circuits, and one of the plurality of transceiver circuits. Each of the one or more transmission drivers drives a node of one of the plurality of data input/output pads. Inductances of the one or more inductors have individual values which are based on a driver strength of each of the one or more transmission drivers.
    Type: Application
    Filed: January 16, 2024
    Publication date: November 21, 2024
    Inventors: Jin Kwan PARK, Daehyun KWON, JANG HOO KIM, CHANG-HYUN BAE, YOO-CHANG SUNG, HYE-SEUNG YU
  • Patent number: 11043805
    Abstract: A semiconductor device includes an internal circuit in a core region, a first protection circuit in a peripheral region surrounding the core region, the first protection circuit including first and second protection sections and a first fuse, and a first pad receiving a first signal. The first pad is electrically connected to the first protection section via the first fuse, and the first pad is electrically connected to the second protection section. The internal circuit is electrically connected to the first pad through the second protection section. When a surge voltage having a magnitude equal to or larger than a predetermined voltage is input to the first pad, each of the first and second protection sections prevent the surge voltage from being applied into the internal circuit.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: June 22, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jang Hoo Kim
  • Publication number: 20190363535
    Abstract: A semiconductor device includes an internal circuit in a core region, a first protection circuit in a peripheral region surrounding the core region, the first protection circuit including first and second protection sections and a first fuse, and a first pad receiving a first signal. The first pad is electrically connected to the first protection section via the first fuse, and the first pad is electrically connected to the second protection section. The internal circuit is electrically connected to the first pad through the second protection section. When a surge voltage having a magnitude equal to or larger than a predetermined voltage is input to the first pad, each of the first and second protection sections prevent the surge voltage from being applied into the internal circuit.
    Type: Application
    Filed: February 4, 2019
    Publication date: November 28, 2019
    Inventor: Jang Hoo Kim
  • Patent number: 8513082
    Abstract: An electrostatic discharge protection device includes a substrate where an active region is defined by an isolation layer, a gate electrode simultaneously crossing both the isolation layer and the active region, and a junction region formed in the active region at both sides of the gate electrode and separated from the isolation layer by a certain distance in a direction where the gate electrode is extended. The electrostatic discharge protection device is able to prevent the increase of a leakage current while securing an electrostatic discharge protection property that a semiconductor device requires.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: August 20, 2013
    Assignee: Hynix Semiconductor inc.
    Inventors: Jang-Hoo Kim, Ho-Woung Kim
  • Publication number: 20130161749
    Abstract: A semiconductor integrated circuit includes: a first conductive line coupled with a first pad for receiving a first voltage; a second conductive line coupled with a second pad for receiving a second voltage; a third conductive line arranged to be placed in a floating state; a first electrostatic discharge unit coupled between a third pad for inputting/outputting a signal and the third conductive line through a first common conductive line, wherein the first electrostatic discharge unit is configured to provide a bi-directional electrostatic discharge path between the third pad and the third conductive line according to an electrostatic discharge mode; a second electrostatic discharge unit coupled between the first conductive line and the third conductive line through a second common conductive line; and a third electrostatic discharge unit coupled between the second conductive line and the third conductive line through a third common conductive line.
    Type: Application
    Filed: May 9, 2012
    Publication date: June 27, 2013
    Inventor: Jang-Hoo KIM
  • Publication number: 20120276704
    Abstract: An electrostatic discharge protection device includes a substrate where an active region is defined by an isolation layer, a gate electrode simultaneously crossing both the isolation layer and the active region, and a junction region formed in the active region at both sides of the gate electrode and separated from the isolation layer by a certain distance in a direction where the gate electrode is extended. The electrostatic discharge protection device is able to prevent the increase of a leakage current while securing an electrostatic discharge protection property that a semiconductor device requires.
    Type: Application
    Filed: July 11, 2012
    Publication date: November 1, 2012
    Inventors: Jang-Hoo KIM, Ho-Woung Kim
  • Patent number: 8242565
    Abstract: An electrostatic discharge protection device includes a substrate where an active region is defined by an isolation layer, a gate electrode simultaneously crossing both the isolation layer and the active region, and a junction region formed in the active region at both sides of the gate electrode and separated from the isolation layer by a certain distance in a direction where the gate electrode is extended. The electrostatic discharge protection device is able to prevent the increase of a leakage current while securing an electrostatic discharge protection property that a semiconductor device requires.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 14, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jang-Hoo Kim, Ho-Woung Kim
  • Publication number: 20120188669
    Abstract: A semiconductor integrated circuit includes an interface pad unit, an input buffer unit configured to receive an external signal through the input buffer unit, an electrostatic discharge unit configured to discharge a static electricity from the interface pad unit, and an input buffer protection unit configured to electrically disconnect the interface pad unit and the input buffer unit from each other when the static electricity is generated.
    Type: Application
    Filed: December 21, 2011
    Publication date: July 26, 2012
    Inventor: Jang-Hoo KIM
  • Patent number: 8228651
    Abstract: An electrostatic discharge (ESD) protection circuit includes an output driver, a bypass unit, and an output driver control unit. The output driver is coupled to a data output pad. The bypass unit is configured to bypass the output driver in conducting an ESD current to a ground voltage terminal. The output driver control unit is configured to interrupt an operation of the output driver when the bypass unit operates.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: July 24, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jang-Hoo Kim
  • Patent number: 7929264
    Abstract: The present invention describes an electro-static discharge protection device that has a low operation voltage and a reduced size. The electro-static discharge protection device includes a power clamp unit that provides a discharge path between a pair of power lines. The power clamp unit includes a trigger unit generating a trigger voltage corresponding to electrostaticity accumulated in a first power line. The power clamp device is switched by the trigger voltage of the trigger unit to form a discharge path to discharge the electrostaticity in the first power line to a second power line. The power clamp device may include an NMOS transistor connected to a gate and a bulk. The power clamp device may also include a resistor for dropping the trigger voltage to apply it to the bulk.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: April 19, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jang Hoo Kim
  • Publication number: 20110026176
    Abstract: An electrostatic discharge (ESD) protection circuit includes an output driver, a bypass unit, and an output driver control unit. The output driver is coupled to a data output pad. The bypass unit is configured to bypass the output driver in conducting an ESD current to a ground voltage terminal. The output driver control unit is configured to interrupt an operation of the output driver when the bypass unit operates.
    Type: Application
    Filed: July 9, 2010
    Publication date: February 3, 2011
    Inventor: Jang-Hoo Kim
  • Publication number: 20100276755
    Abstract: An electrostatic discharge protection device includes a substrate where an active region is defined by an isolation layer, a gate electrode simultaneously crossing both the isolation layer and the active region, and a junction region formed in the active region at both sides of the gate electrode and separated from the isolation layer by a certain distance in a direction where the gate electrode is extended. The electrostatic discharge protection device is able to prevent the increase of a leakage current while securing an electrostatic discharge protection property that a semiconductor device requires.
    Type: Application
    Filed: November 23, 2009
    Publication date: November 4, 2010
    Inventors: Jang-Hoo KIM, Ho-Woung Kim
  • Patent number: 7545616
    Abstract: The present invention relates to a semiconductor circuit, and more particularly, to a circuit for discharging static electricity, which is connected between an internal circuit and an input/output pad to provide a charge device model (CDM) discharging path. The circuit includes a plurality of input/output pads; a plurality of switching units corresponding one-to-one to the input/output pads and turned on in a low voltage state; resistors connected between the input/output pads and the switching units so as to correspond one-to-one to the input/output pads and the switching units; and a CDM discharge unit shared in serial by the plurality of the switching units and providing a ground path.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: June 9, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jang Hoo Kim
  • Publication number: 20090067106
    Abstract: A static electricity discharge circuit applied to a highly integrated semiconductor circuit includes a discharge unit connected with the input/output pad by a node and providing, in parallel to the node, a first discharge path connected with a power voltage line and a second discharge path connected with a ground voltage line, an electrostatic detection unit including a diode chain connected to the node and detecting a detection voltage corresponding to static electricity inputted to the node, and a clamp unit switching the discharge path between the power voltage line and the ground voltage line by the detection voltage of the electrostatic detection unit.
    Type: Application
    Filed: September 10, 2008
    Publication date: March 12, 2009
    Applicant: Hynix Semiconductor, Inc.
    Inventor: Jang Hoo Kim
  • Publication number: 20080247103
    Abstract: The present invention describes an electro-static discharge protection device that has a low operation voltage and a reduced size. The electro-static discharge protection device includes a power clamp unit that provides a discharge path between a pair of power lines. The power clamp unit includes a trigger unit generating a trigger voltage corresponding to electrostaticity accumulated in a first power line. The power clamp device is switched by the trigger voltage of the trigger unit to form a discharge path to discharge the electrostaticity in the first power line to a second power line. The power clamp device may include an NMOS transistor connected to a gate and a bulk. The power clamp device may also include a resistor for dropping the trigger voltage to apply it to the bulk.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 9, 2008
    Inventor: Jang Hoo KIM
  • Publication number: 20080123231
    Abstract: The present invention relates to a semiconductor circuit, and more particularly, to a circuit for discharging static electricity, which is connected between an internal circuit and an input/output pad to provide a charge device model (CDM) discharging path. The circuit includes a plurality of input/output pads; a plurality of switching units corresponding one-to-one to the input/output pads and turned on in a low voltage state; resistors connected between the input/output pads and the switching units so as to correspond one-to-one to the input/output pads and the switching units; and a CDM discharge unit shared in serial by the plurality of the switching units and providing a ground path.
    Type: Application
    Filed: June 29, 2007
    Publication date: May 29, 2008
    Inventor: Jang Hoo KIM
  • Publication number: 20070200140
    Abstract: An electrostatic protection device for a semiconductor circuit for protecting an internal circuit from static electricity applied to the pad includes a first conductivity type semiconductor substrate; second conductivity type diffusion regions formed on the surface of the semiconductor substrate at regular intervals into a dot type; isolation structures formed on the surface of the semiconductor substrate to respectively surround the second conductivity type diffusion regions; and first conductivity type diffusion regions formed on the surface of the semiconductor substrate outside of the second conductivity type diffusion regions and the isolation regions.
    Type: Application
    Filed: February 23, 2007
    Publication date: August 30, 2007
    Inventor: Jang Hoo KIM