Patents by Inventor Jang-Hun Yeh
Jang-Hun Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6842571Abstract: An optical interconnect system includes a stacked arrangement of optical lightpipe layers, one layer assigned to each emitter of the system. The various optical lightpipe layers are designed to provide the same level of light to each receptor of the system. The optical lightpipe layers are very thin, allowing the emitter and receptor devices of the system to span the entire optical lightpipe layer assembly. The path loss between every emitter and every receptor over the entire system can be balanced, i.e., made substantially the same, or otherwise set as desired with respect to individual emitters and receptors.Type: GrantFiled: September 5, 2002Date of Patent: January 11, 2005Assignee: Motorola, Inc.Inventors: Wayne C. Kramer, Daniel R. Schroeder, Hans R. Merz, Gerald W. Ballard, Robert R. Kornowski, Jang-Hun Yeh, James K. Gehrke
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Publication number: 20040047563Abstract: An optical interconnect system includes a stacked arrangement of optical lightpipe layers, one layer assigned to each emitter of the system. The various optical lightpipe layers are designed to provide the same level of light to each receptor of the system. The optical lightpipe layers are very thin, allowing the emitter and receptor devices of the system to span the entire optical lightpipe layer assembly. The path loss between every emitter and every receptor over the entire system can be balanced, i.e., made substantially the same, or otherwise set as desired with respect to individual emitters and receptors.Type: ApplicationFiled: September 5, 2002Publication date: March 11, 2004Applicant: Motorola, Inc.Inventors: Wayne C. Kramer, Daniel R. Schroeder, Hans R. Merz, Gerald W. Ballard, Robert R. Kornowski, Jang-Hun Yeh, James K. Gehrke
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Patent number: 6692979Abstract: A optoelectronic module comprises one or more VCSELs electrically connected to an IC and optically connected to a fiber optic faceplate. The fiber optic faceplate, comprising a closely packed bundle of optical fibers, permits efficient capture of light from the VCSELs. Precise alignment of the faceplate with respect to the VCSELs is not needed since light not collected by one fiber is captured by another nearby optical fiber. One method of fabricating the module comprises forming substrate layers on both sides of the VCSELs such that features can be formed on the first substrate layer while the second temporary substrate layer provides structural support. The method further comprises forming apertures on the first substrate layer by etching. An etch stop buffer layer positioned between the first substrate layer and the VCSELs protects the VCSELs from being etched in the process. The second temporary substrate layer is removed after the fiber optic faceplate is mounted on the first substrate side.Type: GrantFiled: August 13, 2001Date of Patent: February 17, 2004Assignee: Optoic Technology, Inc.Inventors: Jang-Hun Yeh, Xueya Wen, Jinhui Zhai
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Patent number: 6674948Abstract: A optoelectronic module comprises one or more VCSELs electrically connected to an IC and optically connected to a fiber optic faceplate. The fiber optic faceplate, comprising a closely packed bundle of optical fibers, permits efficient capture of light from the VCSELs. Precise alignment of the faceplate with respect to the VCSELs is not needed since light not collected by one fiber is captured by another nearby optical fiber. One method of fabricating the module comprises forming substrate layers on both sides of the VCSELs such that features can be formed on the first substrate layer while the second temporary substrate layer provides structural support. The method further comprises forming apertures on the first substrate layer by etching. An etch stop buffer layer positioned between the first substrate layer and the VCSELs protects the VCSELs from being etched in the process. The second temporary substrate layer is removed after the fiber optic faceplate is mounted on the first substrate side.Type: GrantFiled: August 13, 2001Date of Patent: January 6, 2004Assignee: Optoic Technology, Inc.Inventors: Jang-Hun Yeh, Xueya Wen, Jinhui Zhai
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Publication number: 20030031435Abstract: A optoelectronic module comprises one or more VCSELs electrically connected to an IC and optically connected to a fiber optic faceplate. The fiber optic faceplate, comprising a closely packed bundle of optical fibers, permits efficient capture of light from the VCSELs. Precise alignment of the faceplate with respect to the VCSELs is not needed since light not collected by one fiber is captured by another nearby optical fiber. One method of fabricating the module comprises forming substrate layers on both sides of the VCSELs such that features can be formed on the first substrate layer while the second temporary substrate layer provides structural support. The method further comprises forming apertures on the first substrate layer by etching. An etch stop buffer layer positioned between the first substrate layer and the VCSELs protects the VCSELs from being etched in the process. The second temporary substrate layer is removed after the fiber optic faceplate is mounted on the first substrate side.Type: ApplicationFiled: August 13, 2001Publication date: February 13, 2003Inventors: Jang-Hun Yeh, Xueya Wen, Jinhui Zhai
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Publication number: 20030031218Abstract: A optoelectronic module comprises one or more VCSELs electrically connected to an IC and optically connected to a fiber optic faceplate. The fiber optic faceplate, comprising a closely packed bundle of optical fibers, permits efficient capture of light from the VCSELs. Precise alignment of the faceplate with respect to the VCSELs is not needed since light not collected by one fiber is captured by another nearby optical fiber. One method of fabricating the module comprises forming substrate layers on both sides of the VCSELs such that features can be formed on the first substrate layer while the second temporary substrate layer provides structural support. The method further comprises forming apertures on the first substrate layer by etching. An etch stop buffer layer positioned between the first substrate layer and the VCSELs protects the VCSELs from being etched in the process. The second temporary substrate layer is removed after the fiber optic faceplate is mounted on the first substrate side.Type: ApplicationFiled: August 13, 2001Publication date: February 13, 2003Inventor: Jang-Hun Yeh
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Publication number: 20030032209Abstract: A optoelectronic module comprises one or more VCSELs electrically connected to an IC and optically connected to a fiber optic faceplate. The fiber optic faceplate, comprising a closely packed bundle of optical fibers, permits efficient capture of light from the VCSELs. Precise alignment of the faceplate with respect to the VCSELs is not needed since light not collected by one fiber is captured by another nearby optical fiber. One method of fabricating the module comprises forming substrate layers on both sides of the VCSELs such that features can be formed on the first substrate layer while the second temporary substrate layer provides structural support. The method further comprises forming apertures on the first substrate layer by etching. An etch stop buffer layer positioned between the first substrate layer and the VCSELs protects the VCSELs from being etched in the process. The second temporary substrate layer is removed after the fiber optic faceplate is mounted on the first substrate side.Type: ApplicationFiled: August 13, 2001Publication date: February 13, 2003Inventors: Jang-Hun Yeh, Xueya Wen, Jinhui Zhai
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Patent number: 5978526Abstract: The present invention provides a method and multi-channel optical interconnect device (28) including an optical substrate (29) including a first optical channel (30) having a first predetermined thickness, a second optical channel (32) having a second predetermined thickness, and an optically isolating intermediate section (34) connected to the first optical channel (30) and to the second optical channel (32), the optically isolating intermediate section (34) having a third predetermined thickness, wherein the third predetermined thickness is less than either of the first predetermined thickness and the second predetermined thickness for minimizing optical cross-talk between the first optical channel (30) and the second optical channel (32).Type: GrantFiled: December 19, 1997Date of Patent: November 2, 1999Assignee: Motorola, Inc.Inventors: James Jiro Morikuni, Austin Vincent Harton, Jang-Hun Yeh
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Patent number: 5832147Abstract: A holographic optical interconnect system (100) and method (200) provide flexible, efficient interconnection of a plurality of circuit boards CBs and a plurality of integrated circuit chips. Each CB has at least an optically transparent substrate OTS mate parallel to the CB and extending outside a CB holder. Each OTS mate has parallel sides and carries at least two holographic optical elements HOEs. A first one of the HOEs on a first OTS mate reflects at least a predetermined portion of a first light beam transmitted by a transmitter on a corresponding CB to another HOE, which transmits a received light beam via free space outside the CB holder. On another OTS mate, two HOEs are utilized to receive and direct at least part of the light beam received to a detector on a corresponding CB via free space within the circuit board holder or reflection within the OTS mate.Type: GrantFiled: November 27, 1996Date of Patent: November 3, 1998Assignee: Motorola, Inc.Inventors: Jang-Hun Yeh, John R. Welk
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Patent number: 5776286Abstract: The present invention provides a manufacturing process (600) and method (500) for efficiently providing a multi-holographic optical element substrate unit. Upon preparation of an original continuous/non-continuous holographic optical element with uniform diffraction efficiency and marking the original continuous/non-continuous holographic optical element with predetermined alignment marks, the original continuous/non-continuous holographic optical element is cut into a predetermined number of individual holographic optical elements in accordance with the predetermined alignment marks. Then a substrate is prepared with alignment marks in accordance with the predetermined alignment marks of the individual holographic optical elements, and the individual holographic optical elements are attached to a substrate in accordance with the alignment marks.Type: GrantFiled: January 29, 1997Date of Patent: July 7, 1998Assignee: Motorola, Inc.Inventors: Jang-Hun Yeh, Karl W. Wyatt, Terry Rohde
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Patent number: 5751009Abstract: An optical isolator (10) includes an opto-electronic emitter (16) and an opto-electronic detector (17) mounted over offset portions (12, 13) of a leadframe (11). The offset portions (12, 13) form angles (14, 15) with other portions (24, 25) of the leadframe (11). An optically transmissive material (22) encapsulates the opto-electronic emitter (16) and the opto-electronic detector (17), and a reflective material (20) is located above the opto-electronic emitter (16) and the opto-electronic detector (17). An optically insulative packaging material (26) encapsulates the optically transmissive material (22).Type: GrantFiled: April 25, 1996Date of Patent: May 12, 1998Assignee: Motorola, Inc.Inventors: Samuel J. Anderson, Austin V. Harton, Jang-Hun Yeh, John Bliss, Karl W. Wyatt
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Patent number: 5500912Abstract: An opto-isolator (10) increases optical efficiency by using holographic elements (22,24,26) to direct a beam of light (34) through an optical waveguide (20). An opto-electronic transmitter (12) and receiver (16) are connected to the waveguide to be in alignment with the beam of light reflected by the holographic elements. The transmitter and receiver are disposed on separate leadframe portions (14,18), and the opto-isolator is surrounded by a package (32).Type: GrantFiled: May 2, 1995Date of Patent: March 19, 1996Assignee: Motorola, Inc.Inventors: Paul G. Alonas, Jang-Hun Yeh, Austin V. Harton