Patents by Inventor JANG

JANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10515788
    Abstract: Physical vapor deposition systems are disclosed herein. An exemplary physical vapor deposition system includes a target, a collimator, a power source system, and a control system. The power source system is configured to supply power to the collimator and the target. The control system is configured to control the power source system, such that the collimator is bombarded with noble gas ions during a sputtering process and the target is bombarded with metal ions during a re-sputtering process, wherein the collimator functions as a sputtering target during the sputtering process and as the collimator during the re-sputtering process.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Shing-Chyang Pan, Ching-Hua Hsieh, Ming-Hsing Tsai, Syun-Ming Jang
  • Patent number: 10515707
    Abstract: A memory device comprises a first NAND string that includes a first plurality of memory cells and a first string select switch arranged in series, the first string select switch disposed between a first bit line and a first end of the first plurality, a second NAND string that includes a second plurality of memory cells and a second string select switch arranged in series, the second string select switch disposed between a second bit line and a first end of the second plurality, word lines coupled to memory cells in the first plurality and memory cells in the second plurality, and a string select line coupled to the first and second string select switches. A method of operating such a memory device comprises applying a voltage varying in a manner complementary to absolute temperature to at least one of the word lines and the string select line.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 24, 2019
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yih-Shan Yang, Shin-Jang Shen
  • Patent number: 10513007
    Abstract: The embodiments relate to a porous polyurethane polishing pad and a process for preparing a semiconductor device by using the same. The porous polyurethane polishing pad comprises a urethane-based prepolymer and a curing agent, and has a thickness of 1.5 to 2.5 mm, a number of pores whose average diameter is 10 to 60 ?m, a specific gravity of 0.7 to 0.9 g/cm3, a surface hardness at 25° C. of 45 to 65 Shore D, a tensile strength of 15 to 25 N/mm2, an elongation of 80 to 250%, an AFM (atomic force microscope) elastic modulus of 30 to 100 MPa measured from a polishing surface in direct contact with an object to be polished to a predetermined depth wherein the predetermined depth is 1 to 10 ?m.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: December 24, 2019
    Assignee: SKC CO., LTD.
    Inventors: Jaein Ahn, Jang Won Seo, Sunghoon Yun, Su Young Moon, Myung-Ok Kyun
  • Patent number: 10515841
    Abstract: There is provided a processing method for a package substrate having a plurality of division lines formed on the front side. The processing method includes the steps of holding the back side of the package substrate by using a holding tape and fully cutting the package substrate along the division lines to such a depth corresponding to the middle of the thickness of the holding tape by using a profile grinding tool, thereby dividing the package substrate into individual semiconductor packages. The profile grinding tool has a plurality of projections for cutting the package substrate respectively along the plural division lines. Each projection has an inclined side surface.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: December 24, 2019
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 10516846
    Abstract: An electronic apparatus and a method for controlling the sound of the electronic apparatus are provided. The electronic apparatus includes: a display configured to display content; a speaker configured to output sound; a communicator configured to receive information from an external remote control device; and a controller configured to control the display, the speaker, and the communicator, wherein the controller is configured to, in response to the communicator receiving first control information from the remote control device while the display displays first content and the speaker outputs a first sound corresponding to the first content, control the display to display second content and control the speaker to continuously output the first sound.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Da-hye Park, Pil-Seung Yang, Chan-hong Min, Sung-wook Baek, Young-ah Seong, Say Jang
  • Patent number: 10515621
    Abstract: A vehicle having a plurality of electronic components includes: a communicator configured to receive communicated signals from the plurality of electronic components, at least one electronic component of the plurality of electronic components outputting noise; a storage configured to store noise-related information of the plurality of electronic components; a speaker configured to output sound; and a controller configured to produce an antiphased sound signal to the noise output from the at least one electronic component based on the noise-related information stored in the storage when the at least one electronic component is operating, and control the speaker to output a sound corresponding to the antiphased sound signal.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: December 24, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Jihoon Sung, Jang Soon Han
  • Patent number: 10515955
    Abstract: Example embodiments relating to forming gate structures, e.g., for Fin Field Effect Transistors (FinFETs), are described. In an embodiment, a structure includes first and second device regions comprising first and second FinFETs, respectively, on a substrate. A distance between neighboring gate structures of the first FinFETs is less than a distance between neighboring gate structures of the second FinFETs. A gate structure of at least one of the first FinFETs has a first and second width at a level of and below, respectively, a top surface of a first fin. The first width is greater than the second width. A second gate structure of at least one of the second FinFETs has a third and fourth width at a level of and below, respectively a top surface of a second fin. A difference between the first and second widths is greater than a difference between the third and fourth widths.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Han Lin, Kuei-Yu Kao, Shih-Yao Lin, Ming-Ching Chang, Chao-Cheng Chen, Syun-Ming Jang
  • Patent number: 10515765
    Abstract: A multilayer ceramic capacitor includes a body in which a plurality of dielectric layers are stacked, first and second external electrodes disposed on one surface of the body and spaced apart from each other, a plurality of first and second internal electrodes opposing each other, the dielectric layers being interposed therebetween, a first conductive via connecting the plurality of first internal electrodes to the first external electrode, a second conductive via connecting the plurality of second internal electrodes to the second external electrode, and a shielding layer covering at least a portion of an external surface of the body.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Sik Chong, Young Su Jang
  • Patent number: 10515952
    Abstract: A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first fin structure extending above a substrate, and the first fin structure includes a portion made of silicon germanium (SiGe). The FinFET device structure includes a second fin structure adjacent to the first fin structure. The FinFET device structure also includes a first liner layer formed on the outer sidewall surface of the first fin structure and a second liner layer formed on the inner sidewall surface of the first fin structure. The FinFET device structure further includes a first isolation structure formed on the substrate, and the first liner layer is between the first isolation structure and the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Shu Wu, Shu-Uei Jang, Wei-Yeh Tang, Ryan Chia-Jen Chen, An-Chyi Wei
  • Patent number: 10516828
    Abstract: A mobile terminal and a control method thereof are disclosed. The mobile terminal includes a display, and a controller configured to display, on the display, a home screen on which at least one icon is displayed, to execute an application corresponding to an icon selected from the at least one icon, and to display at least one of a shape, color and size of the at least one icon depending on an execution environment of the application. According to the present invention, a user can intuitively recognize an execution state of an application since an icon corresponding to the application can be displayed differently according to application execution environments.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: December 24, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Mihyun Park, Jongbeom Kim, Hyukjae Jang
  • Patent number: 10515895
    Abstract: A device includes a substrate and at least three conducting features embedded into the substrate. Each conducting feature includes a top width x and a bottom width y, such that a top and bottom width (x1, y1) of a first conducting feature has a dimension of (x1<y1), a top and bottom width (x2, y2) of a second conducting feature has a dimension of (x2<y2; x2=y2; or x2>y2), and a top and bottom width (x3, y3) of a third conducting feature has a dimension of (x3>y3). The device also includes a gap structure isolating the first and second conducting features. The gap structure can include such things as air or dielectric.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-yuan Ting, Chung-Wen Wu, Jeng-Shiou Chen, Jang-Shiang Tsai, Jyu-Horng Shieh
  • Patent number: 10515594
    Abstract: A backlight unit includes a light source module including a first connection pin and a second connection pin electrically connected to the first connection pin, a power converter which provides a driving voltage to the light source module, a connector which receives a first enable signal via a first signal line and provides a second enable signal via a second signal line and a driving circuit which controls a generation of the driving voltage from the power converter in response to the second enable signal. When the connector is electrically connected to the first and second connection pins, the first enable signal is transmitted to the first connection pin via the first signal line and the connector, and the second enable signal from the second connection pin is provided to the driving circuit via the connector and the second signal line.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-won Jang, Won-hyoung Kang, Seung-wan Kim, Gwangteak Lee, Songyi Han, Jin-taek Hong, Seunghwan Moon
  • Patent number: 10516083
    Abstract: An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of the area of the opening region to the area of the masking region in the second region.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: December 24, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Hyeon Chae, Jong Min Jang, Won Young Roh, Dae Woong Suh, Min Woo Kang, Joon Sub Lee, Hyun A. Kim, Kyoung Wan Kim, Chang Yeon Kim
  • Patent number: 10514604
    Abstract: Topcoat compositions are provided that are suitably applied above a photoresist composition. Preferred topcoat compositions comprise a first polymer that comprises (i) first units comprising a nitrogen-containing moiety that comprises an acid-labile group; and (ii) second units that (1) comprise one or more hydrophobic groups and (2) are distinct from the first units.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 24, 2019
    Assignee: Rohm and Haas Electronic Materials Korea Ltd.
    Inventors: Chang-Young Hong, Eui-Hyun Ryu, Min-Kyung Jang, Dong-Yong Kim, Jae Yun Ahn
  • Patent number: 10514308
    Abstract: A method of detecting an environment vale of an electronic device is provided. The method includes measuring a state of one or more units related to the electronic device, determining a value based at least in part on the measured state of the one or more units related to the electronic device, determining an operation state of the electronic device according to the value, and generating an approximated environment value according to the operation state. Further, other various embodiments are available.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: December 24, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Kyu Jang, Han-Sub Jung, Chee-Hoon Lee, Jeong-Min Park, Jae-Woong Chun
  • Patent number: 10515566
    Abstract: A novel electronic language education system device is configured to define, instruct, analyze, and evaluate martial arts movements as characters of a particular language. In one embodiment, the novel electronic language education system includes a martial arts movement linguistic symbolization module and a martial arts movement-to-language character evaluation module that are executed on a CPU and a memory unit of the novel electronic language education system. Preferably, the system further incorporates a visual detection sensor, a gyroscopic sensor, a human limb movement sensor, and/or another sensor to enable capturing and analysis of a martial arts movement routine to create, match, and/or evaluate a digital symbolic key representing the martial arts movement routine, which is digitally paired with a character of the particular language.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: December 24, 2019
    Inventor: Jang Suk Moon
  • Patent number: 10516127
    Abstract: A quantum rod panel includes a first substrate and a second substrate facing each other, a pixel electrode and a common electrode over the first substrate and spaced apart from each other, and a quantum rod layer between the pixel electrode and the common electrode and including quantum rods and metal particles.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: December 24, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sung-Il Woo, Byung-Geol Kim, Kyu-Nam Kim, Kyung-Kook Jang, Tae-Yang Lee
  • Patent number: 10513070
    Abstract: A method includes placing a package structure into a mold chase, with top surfaces of device dies in the package structure contacting a release film in the mold chase. A molding compound is injected into an inner space of the mold chase through an injection port, with the injection port on a side of the mold chase. During the injection of the molding compound, a venting step is performed through a first venting port and a second venting port of the mold chase. The first venting port has a first flow rate, and the second port has a second flow rate different from the first flow rate.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Ping Jang, Yeong-Jyh Lin, Chien Ling Hwang, Chung-Shi Liu, Meng-Tse Chen, Ming-Da Cheng, Chen-Hua Yu
  • Publication number: 20190386347
    Abstract: The invention provides a method of improving the cycle-life of a rechargeable alkali metal-sulfur cell. The method comprises implementing an anode-protecting layer between an anode active material layer and a porous separator/electrolyte, and/or implementing a cathode-protecting layer between a cathode active material and the porous separator/electrolyte, wherein the anode-protecting layer or cathode-protecting layer comprises a conductive sulfonated elastomer composite having from 0.01% to 50% by weight of a conductive reinforcement material dispersed in a sulfonated elastomeric matrix material and the protecting layer has a thickness from 1 nm to 100 ?m, a fully recoverable tensile strain from 2% to 500%, a lithium ion conductivity from 10?7 S/cm to 5×10?2 S/cm, and an electrical conductivity from 10?7 S/cm to 100 S/cm when measured at room temperature. This battery exhibits an excellent combination of high sulfur content, high sulfur utilization efficiency, high energy density, and long cycle life.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 19, 2019
    Applicant: Nanotek Instruments, Inc.
    Inventors: Aruna Zhamu, Bor Z. Jang
  • Patent number: D870763
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cedric Kiefer, Henryk Wollik, Jae Julien, Dae-Wung Kim, Jang-Won Seo, Ji-Hyun Lee, Yoo-Jin Choi