Patents by Inventor Jang Sik Lee

Jang Sik Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250366073
    Abstract: A ferroelectric transistor according to an aspect of the present disclosure includes a substrate, a control gate electrode layer formed on the substrate, a first ferroelectric layer on the control gate electrode layer, an inner electrode layer on the first ferroelectric layer, a second ferroelectric layer on the inner electrode layer, and a semiconductor channel layer on the second ferroelectric layer, wherein a ratio of a second capacitance of a second stacked structure of the inner electrode layer, the second ferroelectric layer, and the semiconductor channel layer to a first capacitance of a first stacked structure of the control gate electrode layer, the first ferroelectric layer, and the inner electrode layer is 5 or more.
    Type: Application
    Filed: May 23, 2025
    Publication date: November 27, 2025
    Inventors: Jang Sik LEE, Ik Jyae KIM
  • Publication number: 20250318205
    Abstract: The present disclosure relates to a ferroelectric thin film transistor and may include: a substrate; a gate electrode layer formed on the substrate; a ferroelectric layer formed on the gate electrode layer, including a hafnium-based oxide, and including an uneven portion having at least one or more step that is formed on the gate electrode layer; a semiconductor channel layer formed on the ferroelectric layer and including an oxide semiconductor; a drain electrode layer connected to the semiconductor channel layer at one side of the gate electrode layer; and a source electrode layer connected to the semiconductor channel layer at the other side of the gate electrode layer.
    Type: Application
    Filed: April 4, 2025
    Publication date: October 9, 2025
    Inventors: Jang Sik LEE, Ik Jyae KIM
  • Patent number: 11925129
    Abstract: The present invention provides a multi-layer selector device exhibiting a low leakage current by controlling a threshold voltage. According to an embodiment of the present invention, the multi-layer selector device comprises: a substrate; a lower electrode layer disposed on the substrate; an insulating layer disposed on the lower electrode layer and having a via hole passing through to expose the lower electrode layer; a switching layer disposed on the lower electrode layer in the via hole, performing a switching operation by forming and destroying a conductive filament, and made of a multi-layer to control the formation of the conductive filament; and an upper electrode layer disposed on the switching layer.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: March 5, 2024
    Assignee: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATION
    Inventors: Jang Sik Lee, Kwang Hyun Kim, Young Jun Park
  • Publication number: 20220367809
    Abstract: The present invention provides a multi-layer selector device exhibiting a low leakage current by controlling a threshold voltage. According to an embodiment of the present invention, the multi-layer selector device comprises: a substrate; a lower electrode layer disposed on the substrate; an insulating layer disposed on the lower electrode layer and having a via hole passing through to expose the lower electrode layer; a switching layer disposed on the lower electrode layer in the via hole, performing a switching operation by forming and destroying a conductive filament, and made of a multi-layer to control the formation of the conductive filament; and an upper electrode layer disposed on the switching layer.
    Type: Application
    Filed: November 9, 2021
    Publication date: November 17, 2022
    Inventors: Jang Sik LEE, Kwang Hyun KIM, Young Jun PARK
  • Patent number: 6635571
    Abstract: Disclosed is a process for depositing an aluminum oxide thin film necessary for semiconductor devices. The process includes the steps of: subjecting a gaseous organoaluminum compound as an aluminum source in contact with a target substrate and depositing aluminum using plasma. The steps are sequentially repeated to form an aluminum thin film, and further includes the step of oxidizing the aluminum thin film using oxygen plasma. This deposition cycle is repeated to obtain an aluminum oxide thin film. The present invention uses an aluminum source containing less contaminant compared to the prior art, thus obtaining aluminum oxide of high quality. Furthermore, the temperature of the gas supply and the reactor can be lowered in relation to the prior art method to reduce costs in the fabrication of semiconductor devices.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: October 21, 2003
    Inventors: Seung Ki Joo, Jang Sik Lee, Chang Wook Jeong
  • Publication number: 20020081394
    Abstract: Disclosed is a process for depositing an aluminum oxide thin film necessary for semiconductor devices. The process includes the steps of: subjecting a gaseous organoaluminum compound as an aluminum source in contact with a target substrate and depositing aluminum using plasma, which steps are sequentially repeated to form an aluminum thin film, and further the step of oxidizing the aluminum thin film using oxygen plasma. This deposition cycle is repeated to obtain an aluminum oxide thin film.
    Type: Application
    Filed: April 25, 2001
    Publication date: June 27, 2002
    Inventors: Seung Ki Joo, Jang Sik Lee, Chang Wook Jeong
  • Patent number: 6340600
    Abstract: A method for fabricating a large single-grained ferroelectric thin film grown by selectively nucleated lateral crystallization (SNLC) using an artificial nucleation seed, a method for fabricating a ferroelectric capacitor using the same, and a method for fabricating a ferroelectric memory device using the same. The ferroelectric thin film fabrication method includes the steps of forming a first conductive layer on one side of a semiconductor substrate, by using a conductive material, forming an artificial nucleation seed in an island form adjacent a position where a ferroelectric thin film is to be formed in the upper portion of the first conductive layer, forming a ferroelectric thin film on the whole surface of the substrate including the nucleation seed, and thermally annealing the ferroelectric thin film to thereby grow the ferroelectric thin film positioned in the lateral side of the nucleation seed into a single-grained ferroelectric thin film.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: January 22, 2002
    Assignee: Seung Kee Joo
    Inventors: Seung Ki Joo, Jang Sik Lee
  • Patent number: 6335207
    Abstract: A method for fabricating a ferroelectric thin film, capable of preventing degradation due to fatigue and aging of a ferroelectric thin film of PZT and enabling crystallization at a low temperature. The ferroelectric thin film fabrication method includes the steps of forming an insulation layer on one side of a semiconductor substrate, forming an electrode layer on the insulation layer, forming a ferroelectric layer on the electrode layer, and performing an ion damage processing on the ferroelectric layer using an ionized gas.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: January 1, 2002
    Inventors: Seung Ki Joo, Jang Sik Lee, Eung Chul Park