Patents by Inventor Jansen Reyes DUEY

Jansen Reyes DUEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10939094
    Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: March 2, 2021
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Lookah Chua, Jansen Reyes Duey, Tarek Lule, Mathieu Thivin
  • Publication number: 20200204794
    Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.
    Type: Application
    Filed: March 5, 2020
    Publication date: June 25, 2020
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Lookah CHUA, Jansen Reyes DUEY, Tarek LULE, Mathieu THIVIN
  • Patent number: 10623728
    Abstract: An electronic device includes an array of image pixels, with the array of image pixels having inputs coupled to control lines and outputs coupled to output lines, and at least one array of dummy pixels, with the at least one array of dummy pixels having inputs coupled to the control lines. Each dummy pixel of the at least one array of dummy pixels is configured to provide a certain output signal in an absence of a fault with at least one of the control lines or of a fault with at least one of the output lines, such that a lack of output of the certain output signal by one or more of the dummy pixels of the at least one array of dummy pixels indicates the fault.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 14, 2020
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Lookah Chua, Jansen Reyes Duey, Tarek Lule, Mathieu Thivin
  • Publication number: 20200014914
    Abstract: An electronic device includes an array of image pixels, with the array of image pixels having inputs coupled to control lines and outputs coupled to output lines, and at least one array of dummy pixels, with the at least one array of dummy pixels having inputs coupled to the control lines. Each dummy pixel of the at least one array of dummy pixels is configured to provide a certain output signal in an absence of a fault with at least one of the control lines or of a fault with at least one of the output lines, such that a lack of output of the certain output signal by one or more of the dummy pixels of the at least one array of dummy pixels indicates the fault.
    Type: Application
    Filed: July 3, 2019
    Publication date: January 9, 2020
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Ptd Ltd
    Inventors: Lookah CHUA, Jansen Reyes DUEY, Tarek LULE, Mathieu THIVIN