Patents by Inventor Janusz Bryzek
Janusz Bryzek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9735112Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.Type: GrantFiled: January 9, 2015Date of Patent: August 15, 2017Assignee: Fairchild Semiconductor CorporationInventors: John Constantino, Timwah Luk, Ahmad Ashrafzadeh, Robert L. Krause, Etan Shacham, Maria Clemens Ypil Quinones, Janusz Bryzek, Chung-Lin Wu
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Patent number: 9586813Abstract: This document refers to multi-die micromechanical system (MEMS) packages. In an example, a multi-die MEMS package can include a controller integrated circuit (IC) configured to couple to a circuit board, a MEMS IC mounted to a first side of the controller IC, a through silicon via extending through the controller IC between the first side and a second side of the controller IC, the second side opposite the first side, and wherein the MEMS IC is coupled to the through silicon via.Type: GrantFiled: July 21, 2015Date of Patent: March 7, 2017Assignee: FAIRCHILD SEMICONDUCTOR CORPORATIONInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20160332868Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.Type: ApplicationFiled: July 25, 2016Publication date: November 17, 2016Inventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
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Patent number: 9425328Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a fill disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.Type: GrantFiled: September 11, 2013Date of Patent: August 23, 2016Assignee: Fairchild Semiconductor CorporationInventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
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Publication number: 20150321904Abstract: This document refers to multi-die micromechanical system (MEMS) packages. In an example, a multi-die MEMS package can include a controller integrated circuit (IC) configured to couple to a circuit board, a MEMS IC mounted to a first side of the controller IC, a through silicon via extending through the controller IC between the first side and a second side of the controller IC, the second side opposite the first side, and wherein the MEMS IC is coupled to the through silicon via.Type: ApplicationFiled: July 21, 2015Publication date: November 12, 2015Inventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Patent number: 9156673Abstract: One example includes an integrated circuit including at least one electrical interconnects disposed on an elongate are extending away from a main portion of the integrated circuit and a microelectromechanical layer including an oscillating portion, the microelectromechanical layer coupled to the main portion of the integrated circuit.Type: GrantFiled: September 18, 2011Date of Patent: October 13, 2015Assignee: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Patent number: 9095072Abstract: This document refers to multi-die micromechanical system (MEMS) packages. In an example, a multi-die MEMS package can include a controller integrated circuit (IC) configured to couple to a circuit board, a MEMS IC mounted to a first side of the controller IC, a through silicon via extending through the controller IC between the first side and a second side of the controller IC, the second side opposite the first side, and wherein the MEMS IC is coupled to the through silicon via.Type: GrantFiled: September 16, 2011Date of Patent: July 28, 2015Assignee: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20150200162Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.Type: ApplicationFiled: January 9, 2015Publication date: July 16, 2015Inventors: John CONSTANTINO, Timwah LUK, Ahmad ASHRAFZADEH, Robert L. KRAUSE, Etan SHACHAM, Maria Clemens Ypil QUINONES, Janusz BRYZEK, Chung-Lin WU
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Patent number: 9006846Abstract: This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can include a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon.Type: GrantFiled: September 20, 2011Date of Patent: April 14, 2015Assignee: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Patent number: 8710599Abstract: Micromachined devices and methods for making the devices. The device includes: a first wafer having at least one via; and a second wafer having a micro-electromechanical-systems (MEMS) layer. The first wafer is bonded to the second wafer. The via forms a closed loop when viewed in a direction normal to the top surface of the first wafer to thereby define an island electrically isolated. The method for fabricating the device includes: providing a first wafer having at least one via; bonding a second wafer having a substantially uniform thickness to the first wafer; and etching the bonded second wafer to form a micro-electromechanical-systems (MEMS) layer.Type: GrantFiled: August 3, 2010Date of Patent: April 29, 2014Assignee: Fairchild Semiconductor CorporationInventors: David Lambe Marx, Cenk Acar, Sandeep Akkaraju, Janusz Bryzek
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Publication number: 20140070339Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a fill disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.Type: ApplicationFiled: September 11, 2013Publication date: March 13, 2014Applicant: Fairchild Semiconductor CorporationInventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
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Publication number: 20130341737Abstract: One example includes an integrated circuit including at least one electrical interconnects disposed on an elongate are extending away from a main portion of the integrated circuit and a microelectromechanical layer including an oscillating portion, the microelectromechanical layer coupled to the main portion of the integrated circuit.Type: ApplicationFiled: September 18, 2011Publication date: December 26, 2013Applicant: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20130277773Abstract: This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can include a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon.Type: ApplicationFiled: September 20, 2011Publication date: October 24, 2013Applicant: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20130277772Abstract: This document discusses, among other things, an apparatus including a silicon die including a vibratory diaphragm, the die having a silicon die top opposite a silicon die bottom, with a top silicon die port extending from the silicon die top through the silicon die to a top of the vibratory diaphragm, and with a bottom silicon die port extending from the silicon die bottom to a bottom of the vibratory diaphragm, wherein the bottom silicon die port has a cross sectional area that is larger than a cross-sectional area of the top silicon die port, a capacitor electrode disposed along a bottom of the silicon die, across the bottom silicon die port, the capacitor electrode including a first signal generation portion that is coextensive with the top silicon die port, and a second signal generation portion surrounding the first portion.Type: ApplicationFiled: September 20, 2011Publication date: October 24, 2013Applicant: Fairchild Semiconductor CorporationInventor: Janusz Bryzek
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Publication number: 20130270660Abstract: One example includes an integrated circuit including at least one electrical interconnects disposed on an elongate are extending away from a main portion of the integrated circuit and a microelectromechanical layer including an oscillating portion, the microelectromechanical layer coupled to the main portion of the integrated circuit, wherein the microelectromechanical layer includes a cap comprising a membrane that extends to the integrated circuit.Type: ApplicationFiled: September 18, 2011Publication date: October 17, 2013Applicant: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20130247668Abstract: This document discusses, among other things, an mode matching circuit for a inertial sensor including an oscillator circuit configured to selectively couple to a sense axis of an inertial sensor and to provide sense frequency information of the sense axis, a frequency comparator configured to receive the sense frequency information of the sense axis and drive frequency information of the inertial sensor, and to provide frequency difference information to a processor, and a programmable bias source configured to apply a bias voltage to the sense axis to set a sense frequency of the sense axis in response to a command from the processor, and to maintain a desired frequency difference between the sense frequency and a drive frequency of the inertial sensor.Type: ApplicationFiled: September 20, 2011Publication date: September 26, 2013Applicant: Fairchild Semiconductor CorporationInventor: Janusz Bryzek
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Publication number: 20130250532Abstract: This document refers to multi-die micromechanical system (MEMS) packages. In an example, a multi-die MEMS package can include a controller integrated circuit (IC) configured to couple to a circuit board, a MEMS IC mounted to a first side of the controller IC, a through silicon via extending through the controller IC between the first side and a second side of the controller IC, the second side opposite the first side, and wherein the MEMS IC is coupled to the through silicon via.Type: ApplicationFiled: September 16, 2011Publication date: September 26, 2013Applicant: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20110031565Abstract: Micromachined devices and methods for making the devices. The device includes: a first wafer having at least one via; and a second wafer having a micro-electromechanical-systems (MEMS) layer. The first wafer is bonded to the second wafer. The via forms a closed loop when viewed in a direction normal to the top surface of the first wafer to thereby define an island electrically isolated. The method for fabricating the device includes: providing a first wafer having at least one via; bonding a second wafer having a substantially uniform thickness to the first wafer; and etching the bonded second wafer to form a micro-electromechanical-systems (MEMS) layer.Type: ApplicationFiled: August 3, 2010Publication date: February 10, 2011Inventors: David Lambe Marx, Cenk Acar, Sandeep Akkaraju, Janusz Bryzek
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Patent number: 7539003Abstract: The devices presented herein are capacitive sensors with single crystal silicon on all key stress points. Isolating trenches are formed by trench and refill forming dielectrically isolated conductive silicon electrodes for drive, sense and guards. For pressure sensing devices according to the invention, the pressure port is opposed to the electrical wire bond pads for ease of packaging. Dual-axis accelerometers measuring in plane acceleration and out of plane acceleration are also described. A third axis in plane is easy to achieve by duplicating and rotating the accelerometer 90 degrees about its out of plane axis Creating resonant structures, angular rate sensors, bolometers, and many other structures are possible with this process technology. Key advantages are hermeticity, vertical vias, vertical and horizontal gap capability, single crystal materials, wafer level packaging, small size, high performance and low cost.Type: GrantFiled: February 16, 2007Date of Patent: May 26, 2009Assignee: LV Sensors, Inc.Inventors: Curtis A. Ray, Janusz Bryzek
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Patent number: 7518493Abstract: The present invention provides a tire pressure sensor system that has multiple functions and is integrated into a small package. The system includes one or more Micro Electro Mechanical System (MEMS)-based sensors, including a MEMS-based pressure sensor; a MEMS-oscillator-based wireless signal transmitter; and a microcontroller, where the microcontroller processes the data generated by at least one of the MEMS-based sensors, controls at least one of the MEMS-based sensors, and controls the encoding and timing of transmission of data from the wireless signal transmitter. Preferably, the MEMS-based sensors, MEMS-oscillator-based wireless signal transmitter, and microcontroller are integrated onto one or more chips in one or more packages. The system also preferably includes a MEMS-based motion sensor, a low frequency (LF) receiver, an IC-based voltage sensor, a voltage regulator, a temperature sensor and a polarization voltage generator.Type: GrantFiled: December 1, 2005Date of Patent: April 14, 2009Assignee: LV Sensors, Inc.Inventors: Janusz Bryzek, Curtis Ray, Brian Lee Bircumshaw, Elizabeth A. Logan