Abstract: An approach to provide a funnel-shaped spin-transfer torque (STT) magnetoresistive random-access memory (MRAM) device with a dual magnetic tunnel junction. The approach includes providing a metal pillar on a connection to a semiconductor device. The approach includes providing a first reference layer on the metal pillar and on a portion of a first interlayer dielectric adjacent to the metal pillar. The approach includes providing a first tunnel barrier on the first reference layer and a free layer on the first tunnel barrier layer. The approach includes providing a second tunnel barrier on the free layer and a second reference layer on the second tunnel barrier of the semiconductor structure of the funnel-shaped spin-transfer torque MRAM device.

Abstract: An approach to provide a funnel-shaped spin-transfer torque (STT) magnetoresistive random-access memory (MRAM) device with a dual magnetic tunnel junction. The approach includes providing a metal pillar on a connection to a semiconductor device. The approach includes providing a first reference layer on the metal pillar and on a portion of a first interlayer dielectric adjacent to the metal pillar. The approach includes providing a first tunnel barrier on the first reference layer and a free layer on the first tunnel barrier layer. The approach includes providing a second tunnel barrier on the free layer and a second reference layer on the second tunnel barrier of the semiconductor structure of the funnel-shaped spin-transfer torque MRAM device.

Abstract: A method of manufacturing a double magnetic tunnel junction device is provided. The method includes forming a first magnetic tunnel junction stack, forming a spin conducting layer on the first magnetic tunnel junction stack, and forming a second magnetic tunnel junction stack on the spin conducting layer. The second magnetic tunnel junction stack has a width that is greater than a width of the first magnetic tunnel junction stack.

Abstract: A method of manufacturing a magnetic tunnel junction device is provided. The method includes forming a conical insulator core, forming a conductor layer on the insulator core, forming a magnetic free layer on the conductor layer, forming a barrier layer on the magnetic free layer, and forming a magnetic fixed layer on the barrier layer.

Abstract: A method of manufacturing a double magnetic tunnel junction device is provided. The method includes forming a first magnetic tunnel junction stack, forming a spin conducting layer on the first magnetic tunnel junction stack, and forming a second magnetic tunnel junction stack on the spin conducting layer. The second magnetic tunnel junction stack has a width that is greater than a width of the first magnetic tunnel junction stack.

Abstract: A method of manufacturing a magnetic tunnel junction device is provided. The method includes forming a conical insulator core, forming a conductor layer on the insulator core, forming a magnetic free layer on the conductor layer, forming a barrier layer on the magnetic free layer, and forming a magnetic fixed layer on the barrier layer.

Abstract: Techniques for shielding magnetic memory cells from magnetic fields are presented. In accordance with aspects of the invention, a magnetic storage element is formed with at least one conductive segment electrically coupled to the magnetic storage element. At least a portion of the conductive segment is surrounded with a magnetic liner. The magnetic liner is operative to divert at least a portion of a magnetic field created by a current passing through the conductive segment away from the magnetic storage element.

Abstract: The present invention relates to a head having an air bearing surface for confronting the surface of a storage medium. The head includes a first pole that is spaced apart from a second pole. At least one non-magnetic spacer is positioned between the first pole and the second pole such that the first pole is magnetically decoupled from the second pole. In a further aspect, one or both of the first pole and the second pole can be elliptical in shape.

Abstract: Techniques for shielding magnetic memory cells from magnetic fields are presented. In accordance with aspects of the invention, a magnetic storage element is formed with at least one conductive segment electrically coupled to the magnetic storage element. At least a portion of the conductive segment is surrounded with a magnetic liner. The magnetic liner is operative to divert at least a portion of a magnetic field created by a current passing through the conductive segment away from the magnetic storage element.

Abstract: A method for repairing a shorted tunnel device includes the step of applying a stressing signal to the tunnel device. The stressing signal has an amplitude that is greater than an amplitude of a bias signal applied to the device during normal operation. One or more characteristics of the stressing signal are selected so as to substantially optimize a repair of the device. The amplitude and/or the duration of the stressing signal are preferably selected so as to remove a conductive filament shorting the device via a thermal mechanism (e.g., heating).

Abstract: Apparatus for repairing one or more shorted memory cells in a memory circuit includes control circuitry. The control circuitry is operative in one of at least a first mode and a second mode. In the first mode, the control circuitry is operative to apply a first signal to a selected memory cell in the memory circuit for reading a logic state of the selected memory cell and to determine whether or not the selected memory cell is shorted. In the second mode, the control circuitry is operative to apply a second signal to a selected memory cell which has been determined to be shorted for initiating a repair of the selected memory cell, the second signal being greater in magnitude than the first signal.

Abstract: Apparatus for repairing one or more shorted memory cells in a memory circuit includes control circuitry. The control circuitry is operative in one of at least a first mode and a second mode. In the first mode, the control circuitry is operative to apply a first signal to a selected memory cell in the memory circuit for reading a logic state of the selected memory cell and to determine whether or not the selected memory cell is shorted. In the second mode, the control circuitry is operative to apply a second signal to a selected memory cell which has been determined to be shorted for initiating a repair of the selected memory cell, the second signal being greater in magnitude than the first signal.

Abstract: The present invention provides a tunneling magneto-resistive read sensor structure that improves sensitivity and linear density of the sensor structure. The sensor includes first and second electrodes and a stack positioned between the electrodes. The stack includes first and second free layers with magnetization orientations that are biased relative to each other. A tunneling barrier (insulating layer) or non-magnetic metal spacer is positioned between the first and second free layers. A sense current is passed between the first and second free layers of the stack. The amount of current passing through the first and second free layer changes based upon the orientation of the first and second free layers relative to each other.

Abstract: A magnetoresistive sensor having two free layers with shape anisotropy induced magnetic alignment is disclosed. The magnetoresistive sensor includes a first ferromagnetic free layer having a first quiescent state magnetization direction. The magnetoresistive sensor also includes a second elongated free layer having a second quiescent state magnetization direction and positioned such that the first quiescent state magnetization direction is generally orthogonal to the second quiescent state magnetization direction. Further, a portion of the second ferromagnetic free layer overlaps a portion of the first ferromagnetic free layer proximal to an air bearing surface to form a v-shape. A nonmagnetic spacer layer is also positioned between the first ferromagnetic free layer and the second ferromagnetic free layer.