Patents by Inventor Jari Petri Patana

Jari Petri Patana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6707855
    Abstract: A digital delta-sigma modulator for controlling a multi-modulus divider in a fractional-N frequency synthesizer features cascaded delta-sigma modulator stages in a feed-forward circuit topology to extend the possible multi-modulus control output values between the range of −1 to +1. A direct input receives an N-bit input control word which can be dithered, for example, by a sinewave in a two's complement format. The digital delta-sigma modulator can be of any type and includes cascaded accumulators and pipelined accumulator topologies.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: March 16, 2004
    Assignee: Nokia Corporation
    Inventor: Jari Petri Patana
  • Publication number: 20030235261
    Abstract: A digital delta-sigma modulator for controlling a multi-modulus divider in a fractional-N frequency synthesizer features cascaded delta-sigma modulator stages in a feed-forward circuit topology to extend the possible multi-modulus control output values between the range of −1 to +1. A direct input receives an N-bit input control word which can be dithered, for example, by a sinewave in a two's complement format. The digital delta-sigma modulator can be of any type and includes cascaded accumulators and pipelined accumulator topologies.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Applicant: Nokia Corporation
    Inventor: Jari Petri Patana
  • Patent number: 6600378
    Abstract: A fractional-N frequency synthesizer is disclosed wherein the multi-modulus frequency divider in the feedback path of the phase locked loop is controlled by a delta-sigma modulator to achieve the desired division ratio. The fractional input control signal to the delta sigma modulator is dither to break any periodicity in the modulator output signal to avoid the generation of fractional spurious frequencies.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: July 29, 2003
    Assignee: Nokia Corporation
    Inventor: Jari Petri Patana
  • Publication number: 20030137359
    Abstract: A fractional-N frequency synthesizer is disclosed wherein the multi-modulus frequency divider in the feedback path of the phase locked loop is controlled by a delta-sigma modulator to achieve the desired division ratio. The fractional input control signal to the delta sigma modulator is dithered to break any periodicity in the modulator output signal to avoid the generation of fractional spurious frequencies.
    Type: Application
    Filed: January 18, 2002
    Publication date: July 24, 2003
    Applicant: Nokia Corporation
    Inventor: Jari Petri Patana