Patents by Inventor Jaroslaw E. Adamski

Jaroslaw E. Adamski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Biasing methods and devices for power amplifiers
    Patent number: 8111104
    Abstract: Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: February 7, 2012
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Joseph F. Ahadian, Vikas Sharma, Neil Calanca, Jaroslaw E. Adamski
  • Biasing methods and devices for power amplifiers
    Publication number: 20110181364
    Abstract: Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Inventors: Joseph F. Ahadian, Vikas Sharma, Neil Calanca, Jaroslaw E. Adamski
  • System and method for reducing startup time in a temperature controlled crystal oscillator
    Patent number: 6646514
    Abstract: A method and apparatus are provided for reducing a startup interval of a temperature controlled crystal oscillator chip. The method includes the steps of connecting an operating circuit of the temperature controlled crystal oscillator chip into a first configuration to reduce the startup interval following application of power and reconnecting the operating circuit into a second configuration after a predetermined time period.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: November 11, 2003
    Assignee: CTS Corporation
    Inventors: Richard N. Sutliff, Jaroslaw E. Adamski, Ammar Yasser Rathore, Iyad Alhayek
  • Method of exchanging data with a temperature controlled crystal oscillator
    Publication number: 20020113662
    Abstract: A method and apparatus are provided for exchanging data with a temperature controlled crystal oscillator chip. The method includes the steps of receiving data within the temperature controlled crystal oscillator chip through a first bonding pad of the chip during a first time interval and transmitting data from the temperature controlled crystal oscillator chip through the first bonding pad of the chip during a second time interval.
    Type: Application
    Filed: December 20, 2001
    Publication date: August 22, 2002
    Inventors: Ammar Yasser Rathore, Jaroslaw E. Adamski, Richard N. Sutliff, Iyad Alhayek
  • System and method for reduceing startup time in a temperature controlled crystal oscillator
    Publication number: 20020084863
    Abstract: A method and apparatus are provided for reducing a startup interval of a temperature controlled crystal oscillator chip. The method includes the steps of connecting an operating circuit of the temperature controlled crystal oscillator chip into a first configuration to reduce the startup interval following application of power and reconnecting the operating circuit into a second configuration after a predetermined time period.
    Type: Application
    Filed: December 27, 2001
    Publication date: July 4, 2002
    Inventors: Richard N. Sutliff, Jaroslaw E. Adamski, Ammar Yasser Rathore, Iyad Alhayek
  • Electrode connection configuration and method for a multi-pole monolithic crystal filter
    Patent number: 6020797
    Abstract: A multi-pole monolithic crystal filter with at least three acoustically coupled resonators (50,52,54) on a piezoelectric blank (56). Each resonator (50,52,54) has associated top and bottom electrodes (70,72,74,76,78,80). An input connection (62) is coupled to the top electrode (70) of a first resonator (50) and a ground connection (64) is coupled to the bottom electrode (72) of the first resonator (50). An output connection (68) is coupled to the bottom electrode (80) of a last resonator (54) and a ground connection (66) is coupled to the top electrode (78) of the last resonator (54). The top and bottom electrodes (74,76) of each of the remaining resonators (52) are coupled to each other.
    Type: Grant
    Filed: August 21, 1998
    Date of Patent: February 1, 2000
    Assignee: CTS Corporation
    Inventors: Jaroslaw E. Adamski, Charles L. Zimnicki, Richard T. Wong